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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Merge branch 'x86-olpc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-olpc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, olpc-xo15-sci: Enable EC wakeup capability x86, olpc: Fix dependency on POWER_SUPPLY x86, olpc: Add XO-1.5 SCI driver x86, olpc: Add XO-1 RTC driver x86, olpc-xo1-sci: Propagate power supply/battery events x86, olpc-xo1-sci: Add lid switch functionality x86, olpc-xo1-sci: Add GPE handler and ebook switch functionality x86, olpc: EC SCI wakeup mask functionality x86, olpc: Add XO-1 SCI driver and power button control x86, olpc: Add XO-1 suspend/resume support x86, olpc: Rename olpc-xo1 to olpc-xo1-pm x86, olpc: Move CS5536-related constants to cs5535.h x86, olpc: Add missing elements to device tree
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13 changed files with 1547 additions and 163 deletions
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@ -11,6 +11,8 @@
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#ifndef _CS5535_H
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#define _CS5535_H
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#include <asm/msr.h>
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/* MSRs */
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#define MSR_GLIU_P2D_RO0 0x10000029
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@ -38,17 +40,75 @@
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#define MSR_MFGPT_NR 0x51400029
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#define MSR_MFGPT_SETUP 0x5140002B
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#define MSR_RTC_DOMA_OFFSET 0x51400055
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#define MSR_RTC_MONA_OFFSET 0x51400056
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#define MSR_RTC_CEN_OFFSET 0x51400057
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#define MSR_LX_SPARE_MSR 0x80000011 /* DC-specific */
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#define MSR_GX_GLD_MSR_CONFIG 0xC0002001
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#define MSR_GX_MSR_PADSEL 0xC0002011
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static inline int cs5535_pic_unreqz_select_high(unsigned int group,
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unsigned int irq)
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{
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uint32_t lo, hi;
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rdmsr(MSR_PIC_ZSEL_HIGH, lo, hi);
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lo &= ~(0xF << (group * 4));
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lo |= (irq & 0xF) << (group * 4);
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wrmsr(MSR_PIC_ZSEL_HIGH, lo, hi);
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return 0;
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}
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/* PIC registers */
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#define CS5536_PIC_INT_SEL1 0x4d0
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#define CS5536_PIC_INT_SEL2 0x4d1
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/* resource sizes */
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#define LBAR_GPIO_SIZE 0xFF
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#define LBAR_MFGPT_SIZE 0x40
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#define LBAR_ACPI_SIZE 0x40
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#define LBAR_PMS_SIZE 0x80
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/*
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* PMC registers (PMS block)
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* It is only safe to access these registers as dword accesses.
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* See CS5536 Specification Update erratas 17 & 18
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*/
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#define CS5536_PM_SCLK 0x10
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#define CS5536_PM_IN_SLPCTL 0x20
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#define CS5536_PM_WKXD 0x34
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#define CS5536_PM_WKD 0x30
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#define CS5536_PM_SSC 0x54
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/*
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* PM registers (ACPI block)
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* It is only safe to access these registers as dword accesses.
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* See CS5536 Specification Update erratas 17 & 18
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*/
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#define CS5536_PM1_STS 0x00
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#define CS5536_PM1_EN 0x02
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#define CS5536_PM1_CNT 0x08
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#define CS5536_PM_GPE0_STS 0x18
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#define CS5536_PM_GPE0_EN 0x1c
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/* CS5536_PM1_STS bits */
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#define CS5536_WAK_FLAG (1 << 15)
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#define CS5536_PWRBTN_FLAG (1 << 8)
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/* CS5536_PM1_EN bits */
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#define CS5536_PM_PWRBTN (1 << 8)
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#define CS5536_PM_RTC (1 << 10)
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/* CS5536_PM_GPE0_STS bits */
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#define CS5536_GPIOM7_PME_FLAG (1 << 31)
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#define CS5536_GPIOM6_PME_FLAG (1 << 30)
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/* CS5536_PM_GPE0_EN bits */
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#define CS5536_GPIOM7_PME_EN (1 << 31)
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#define CS5536_GPIOM6_PME_EN (1 << 30)
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/* VSA2 magic values */
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#define VSA_VRC_INDEX 0xAC1C
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#define VSA_VRC_DATA 0xAC1E
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