diff --git a/qcom/sm8150-v2.dtsi b/qcom/sm8150-v2.dtsi index d527c3b2c2d9..5c7d57267369 100644 --- a/qcom/sm8150-v2.dtsi +++ b/qcom/sm8150-v2.dtsi @@ -297,6 +297,44 @@ 0x0a44 0x03 0x0>; }; +&msm_fastrpc { + qcom,msm_fastrpc_compute_cb1 { + iommus = <&apps_smmu 0x1001 0x0460>; + }; + + qcom,msm_fastrpc_compute_cb2 { + iommus = <&apps_smmu 0x1002 0x0460>; + }; + + qcom,msm_fastrpc_compute_cb3 { + iommus = <&apps_smmu 0x1003 0x0460>; + }; + + qcom,msm_fastrpc_compute_cb4 { + iommus = <&apps_smmu 0x1004 0x0460>; + }; + + qcom,msm_fastrpc_compute_cb5 { + iommus = <&apps_smmu 0x1005 0x0460>; + }; + + qcom,msm_fastrpc_compute_cb6 { + iommus = <&apps_smmu 0x1006 0x0460>; + }; + + qcom,msm_fastrpc_compute_cb7 { + iommus = <&apps_smmu 0x1007 0x0460>; + }; + + qcom,msm_fastrpc_compute_cb8 { + iommus = <&apps_smmu 0x1008 0x0460>; + }; + + qcom,msm_fastrpc_compute_cb9 { + iommus = <&apps_smmu 0x1009 0x0460>; + }; +}; + /* GPU overrides */ &msm_gpu { /* Updated chip ID */ diff --git a/qcom/sm8150.dtsi b/qcom/sm8150.dtsi index c271c07638e9..3892b283549c 100644 --- a/qcom/sm8150.dtsi +++ b/qcom/sm8150.dtsi @@ -1475,6 +1475,167 @@ }; }; + qcom,msm-cdsp-loader { + compatible = "qcom,cdsp-loader"; + qcom,proc-img-to-load = "cdsp"; + }; + + qcom,msm-adsprpc-mem { + compatible = "qcom,msm-adsprpc-mem-region"; + memory-region = <&adsp_mem>; + }; + + msm_fastrpc: qcom,msm_fastrpc { + compatible = "qcom,msm-fastrpc-compute"; + qcom,fastrpc-adsp-audio-pdr; + qcom,rpc-latency-us = <235>; + + qcom,msm_fastrpc_compute_cb1 { + compatible = "qcom,msm-fastrpc-compute-cb"; + label = "cdsprpc-smd"; + iommus = <&apps_smmu 0x1401 0x2040>, + <&apps_smmu 0x1421 0x0>, + <&apps_smmu 0x2001 0x420>, + <&apps_smmu 0x2041 0x0>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable"; + dma-coherent-hint-cached; + }; + + qcom,msm_fastrpc_compute_cb4 { + compatible = "qcom,msm-fastrpc-compute-cb"; + label = "cdsprpc-smd"; + iommus = <&apps_smmu 0x4 0x3440>, + <&apps_smmu 0x24 0x3400>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable"; + dma-coherent-hint-cached; + }; + + qcom,msm_fastrpc_compute_cb5 { + compatible = "qcom,msm-fastrpc-compute-cb"; + label = "cdsprpc-smd"; + iommus = <&apps_smmu 0x5 0x3440>, + <&apps_smmu 0x25 0x3400>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable"; + dma-coherent-hint-cached; + }; + + qcom,msm_fastrpc_compute_cb6 { + compatible = "qcom,msm-fastrpc-compute-cb"; + label = "cdsprpc-smd"; + iommus = <&apps_smmu 0x6 0x3460>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable"; + dma-coherent-hint-cached; + }; + + qcom,msm_fastrpc_compute_cb7 { + compatible = "qcom,msm-fastrpc-compute-cb"; + label = "cdsprpc-smd"; + iommus = <&apps_smmu 0x7 0x3460>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable"; + dma-coherent-hint-cached; + }; + + qcom,msm_fastrpc_compute_cb8 { + compatible = "qcom,msm-fastrpc-compute-cb"; + label = "cdsprpc-smd"; + iommus = <&apps_smmu 0x8 0x3460>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable"; + dma-coherent-hint-cached; + }; + + qcom,msm_fastrpc_compute_cb2 { + compatible = "qcom,msm-fastrpc-compute-cb"; + label = "cdsprpc-smd"; + iommus = <&apps_smmu 0x2 0x3440>, + <&apps_smmu 0x22 0x3400>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable"; + dma-coherent-hint-cached; + }; + + qcom,msm_fastrpc_compute_cb3 { + compatible = "qcom,msm-fastrpc-compute-cb"; + label = "cdsprpc-smd"; + iommus = <&apps_smmu 0x3 0x3440>, + <&apps_smmu 0x1423 0x0>, + <&apps_smmu 0x2023 0x0>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable"; + dma-coherent-hint-cached; + }; + + qcom,msm_fastrpc_compute_cb9 { + compatible = "qcom,msm-fastrpc-compute-cb"; + label = "cdsprpc-smd"; + qcom,secure-context-bank; + iommus = <&apps_smmu 0x9 0x3460>; + qcom,iommu-dma-addr-pool = <0x60000000 0x78000000>; + qcom,iommu-faults = "stall-disable"; + dma-coherent-hint-cached; + }; + + qcom,msm_fastrpc_compute_cb10 { + compatible = "qcom,msm-fastrpc-compute-cb"; + label = "adsprpc-smd"; + iommus = <&apps_smmu 0x1b23 0x0>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable"; + dma-coherent-hint-cached; + }; + + qcom,msm_fastrpc_compute_cb11 { + compatible = "qcom,msm-fastrpc-compute-cb"; + label = "adsprpc-smd"; + iommus = <&apps_smmu 0x1b24 0x0>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable"; + dma-coherent-hint-cached; + }; + + qcom,msm_fastrpc_compute_cb12 { + compatible = "qcom,msm-fastrpc-compute-cb"; + label = "adsprpc-smd"; + iommus = <&apps_smmu 0x1b25 0x0>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable"; + dma-coherent-hint-cached; + }; + + qcom,msm_fastrpc_compute_cb13 { + compatible = "qcom,msm-fastrpc-compute-cb"; + label = "sdsprpc-smd"; + iommus = <&apps_smmu 0x5a1 0x0>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable"; + dma-coherent-hint-cached; + }; + + qcom,msm_fastrpc_compute_cb14 { + compatible = "qcom,msm-fastrpc-compute-cb"; + label = "sdsprpc-smd"; + iommus = <&apps_smmu 0x5a2 0x0>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable"; + dma-coherent-hint-cached; + }; + + qcom,msm_fastrpc_compute_cb15 { + compatible = "qcom,msm-fastrpc-compute-cb"; + label = "sdsprpc-smd"; + iommus = <&apps_smmu 0x5a3 0x0>; + shared-cb = <4>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable"; + dma-coherent-hint-cached; + }; + }; + qcom,glink { compatible = "qcom,glink"; #address-cells = <1>;