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Merge "disp: msm: sde: add ubwc entries to crtc only if supported"

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qctecmdr 2020-05-25 10:52:49 -07:00 • committed by Gerrit - the friendly Code Review server
commit fc44cf529b
2 changed files with 10 additions and 7 deletions
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11
msm/sde/sde_crtc.c
View file

@ -5134,13 +5134,16 @@ static void sde_crtc_setup_capabilities_blob(struct sde_kms_info *info,
if (catalog->qseed_type == SDE_SSPP_SCALER_QSEED3LITE)
sde_kms_info_add_keystr(info, "qseed_type", "qseed3lite");
sde_kms_info_add_keyint(info, "UBWC version", catalog->ubwc_version);
sde_kms_info_add_keyint(info, "UBWC macrotile_mode",
if (catalog->ubwc_version) {
sde_kms_info_add_keyint(info, "UBWC version",
catalog->ubwc_version);
sde_kms_info_add_keyint(info, "UBWC macrotile_mode",
catalog->macrotile_mode);
sde_kms_info_add_keyint(info, "UBWC highest banking bit",
sde_kms_info_add_keyint(info, "UBWC highest banking bit",
catalog->mdp[0].highest_bank_bit);
sde_kms_info_add_keyint(info, "UBWC swizzle",
sde_kms_info_add_keyint(info, "UBWC swizzle",
catalog->mdp[0].ubwc_swizzle);
}
if (of_fdt_get_ddrtype() == LP_DDR4_TYPE)
sde_kms_info_add_keystr(info, "DDR version", "DDR4");

6
msm/sde/sde_hw_catalog.c
View file

@ -50,8 +50,8 @@
*/
#define DEFAULT_SDE_HIGHEST_BANK_BIT 0x02
/* default ubwc version */
#define DEFAULT_SDE_UBWC_VERSION SDE_HW_UBWC_VER_10
/* No UBWC */
#define DEFAULT_SDE_UBWC_NONE 0x0
/* default ubwc static config register value */
#define DEFAULT_SDE_UBWC_STATIC 0x0
@ -3654,7 +3654,7 @@ static void _sde_top_parse_dt_helper(struct sde_mdss_cfg *cfg,
cfg->ubwc_version = props->exists[UBWC_VERSION] ?
SDE_HW_UBWC_VER(PROP_VALUE_ACCESS(props->values,
UBWC_VERSION, 0)) : DEFAULT_SDE_UBWC_VERSION;
UBWC_VERSION, 0)) : DEFAULT_SDE_UBWC_NONE;
cfg->mdp[0].highest_bank_bit = props->exists[BANK_BIT] ?
PROP_VALUE_ACCESS(props->values, BANK_BIT, 0) :