diff --git a/core/hdd/src/wlan_hdd_he.c b/core/hdd/src/wlan_hdd_he.c index 9c255ed7b497..544091681d6e 100644 --- a/core/hdd/src/wlan_hdd_he.c +++ b/core/hdd/src/wlan_hdd_he.c @@ -107,6 +107,8 @@ void hdd_update_tgt_he_cap(struct hdd_context *hdd_ctx, he_cap->ndp_feedback_supp); hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_OPS_SUPP, he_cap->ops_supp); + hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_AMSDU_IN_AMPDU, + he_cap->amsdu_in_ampdu); hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_DUAL_BAND, he_cap->dual_band); chan_width = HE_CH_WIDTH_COMBINE(he_cap->chan_width_0, @@ -122,6 +124,8 @@ void hdd_update_tgt_he_cap(struct hdd_context *hdd_ctx, hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_LDPC, he_cap->ldpc_coding); hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_LTF_PPDU, he_cap->he_1x_ltf_800_gi_ppdu); + hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_MIDAMBLE_RX_MAX_NSTS, + he_cap->midamble_rx_max_nsts); hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_LTF_NDP, he_cap->he_4x_ltf_3200_gi_ndp); hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_STBC_LT80, @@ -171,7 +175,16 @@ void hdd_update_tgt_he_cap(struct hdd_context *hdd_ctx, he_cap->stbc_gt_80mhz); hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_ER_4x_LTF_GI, he_cap->er_he_ltf_800_gi_4x); - + hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_PPDU_20_IN_40MHZ_2G, + he_cap->he_ppdu_20_in_40Mhz_2G); + hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_PPDU_20_IN_160_80P80MHZ, + he_cap->he_ppdu_20_in_160_80p80Mhz); + hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_PPDU_80_IN_160_80P80MHZ, + he_cap->he_ppdu_80_in_160_80p80Mhz); + hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_ER_1X_HE_LTF_GI, + he_cap->er_1x_he_ltf_gi); + hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_MIDAMBLE_RX_1X_HE_LTF, + he_cap->midamble_rx_1x_he_ltf); hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_RX_MCS_MAP_LT_80, he_cap->rx_he_mcs_map_lt_80); hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_TX_MCS_MAP_LT_80, diff --git a/core/mac/inc/sir_mac_prot_def.h b/core/mac/inc/sir_mac_prot_def.h index 3c1684955ba6..bbc7d2a9b76e 100644 --- a/core/mac/inc/sir_mac_prot_def.h +++ b/core/mac/inc/sir_mac_prot_def.h @@ -2129,7 +2129,8 @@ struct he_capability_info { uint32_t twt_request:1; uint32_t htc_he:1; - uint8_t reserved1:2; + uint8_t reserved1:1; + uint8_t amsdu_in_ampdu:1; uint8_t ops_supp:1; uint8_t ndp_feedback_supp:1; uint8_t sr_responder:1; @@ -2145,7 +2146,7 @@ struct he_capability_info { uint32_t doppler:2; uint32_t stbc_lt_80mhz:2; uint32_t he_4x_ltf_3200_gi_ndp:1; - uint32_t reserved2:2; + uint32_t midamble_rx_max_nsts:2; uint32_t he_1x_ltf_800_gi_ppdu:1; uint32_t ldpc_coding:1; uint32_t device_class:1; @@ -2173,7 +2174,12 @@ struct he_capability_info { uint32_t mu_beamformer:1; uint32_t su_beamformee:1; - uint8_t reserved2:3; + uint8_t reserved2:2; + uint8_t midamble_rx_1x_he_ltf:1; + uint8_t er_1x_he_ltf_gi:1; + uint8_t he_ppdu_80_in_160_80p80Mhz:1; + uint8_t he_ppdu_20_in_160_80p80Mhz:1; + uint8_t he_ppdu_20_in_40Mhz_2G:1; uint8_t er_he_ltf_800_gi_4x:1; uint16_t tx_he_mcs_map_80_80; @@ -2213,7 +2219,8 @@ struct he_capability_info { uint8_t sr_responder:1; uint8_t ndp_feedback_supp:1; uint8_t ops_supp:1; - uint8_t reserved1:2; + uint8_t amsdu_in_ampdu:1; + uint8_t reserved1:1; uint32_t dual_band:1; uint32_t chan_width:7; @@ -2221,7 +2228,7 @@ struct he_capability_info { uint32_t device_class:1; uint32_t ldpc_coding:1; uint32_t he_1x_ltf_800_gi_ppdu:1; - uint32_t reserved2:2; + uint32_t midamble_rx_max_nsts:2; uint32_t he_4x_ltf_3200_gi_ndp:1; uint32_t stbc_lt_80mhz:2; uint32_t doppler:2; @@ -2252,7 +2259,12 @@ struct he_capability_info { uint32_t stbc_gt_80mhz:2; uint8_t er_he_ltf_800_gi_4x:1; - uint8_t reserved3:7; + uint8_t he_ppdu_20_in_40Mhz_2G:1; + uint8_t he_ppdu_20_in_160_80p80Mhz:1; + uint8_t he_ppdu_80_in_160_80p80Mhz:1; + uint8_t er_1x_he_ltf_gi:1; + uint8_t midamble_rx_1x_he_ltf:1; + uint8_t reserved2:2; uint16_t rx_he_mcs_map_lt_80; uint16_t tx_he_mcs_map_lt_80; diff --git a/core/mac/inc/wni_cfg.h b/core/mac/inc/wni_cfg.h index 0ac55e981dc9..826977ed378a 100644 --- a/core/mac/inc/wni_cfg.h +++ b/core/mac/inc/wni_cfg.h @@ -281,12 +281,14 @@ enum { WNI_CFG_HE_SR_RESPONDER, WNI_CFG_HE_NDP_FEEDBACK_SUPP, WNI_CFG_HE_OPS_SUPP, + WNI_CFG_HE_AMSDU_IN_AMPDU, WNI_CFG_HE_DUAL_BAND, WNI_CFG_HE_CHAN_WIDTH, WNI_CFG_HE_RX_PREAM_PUNC, WNI_CFG_HE_CLASS_OF_DEVICE, WNI_CFG_HE_LDPC, WNI_CFG_HE_LTF_PPDU, + WNI_CFG_HE_MIDAMBLE_RX_MAX_NSTS, WNI_CFG_HE_LTF_NDP, WNI_CFG_HE_STBC_LT80, WNI_CFG_HE_DOPPLER, @@ -315,6 +317,11 @@ enum { WNI_CFG_HE_MAX_NC, WNI_CFG_HE_STBC_GT80, WNI_CFG_HE_ER_4x_LTF_GI, + WNI_CFG_HE_PPDU_20_IN_40MHZ_2G, + WNI_CFG_HE_PPDU_20_IN_160_80P80MHZ, + WNI_CFG_HE_PPDU_80_IN_160_80P80MHZ, + WNI_CFG_HE_ER_1X_HE_LTF_GI, + WNI_CFG_HE_MIDAMBLE_RX_1X_HE_LTF, WNI_CFG_HE_RX_MCS_MAP_LT_80, WNI_CFG_HE_TX_MCS_MAP_LT_80, WNI_CFG_HE_RX_MCS_MAP_160, @@ -1485,6 +1492,10 @@ enum { #define WNI_CFG_HE_OPS_SUPP_STAMAX 1 #define WNI_CFG_HE_OPS_SUPP_STADEF 0 +#define WNI_CFG_HE_AMSDU_IN_AMPDU_MIN 0 +#define WNI_CFG_HE_AMSDU_IN_AMPDU_MAX 1 +#define WNI_CFG_HE_AMSDU_IN_AMPDU_DEF 0 + #define WNI_CFG_HE_DUAL_BAND_STAMIN 0 #define WNI_CFG_HE_DUAL_BAND_STAMAX 1 #define WNI_CFG_HE_DUAL_BAND_STADEF 0 @@ -1509,6 +1520,10 @@ enum { #define WNI_CFG_HE_LTF_PPDU_STAMAX 0x3 #define WNI_CFG_HE_LTF_PPDU_STADEF 0 +#define WNI_CFG_HE_MIDAMBLE_RX_MAX_NSTS_MIN 0 +#define WNI_CFG_HE_MIDAMBLE_RX_MAX_NSTS_MAX 0x3 +#define WNI_CFG_HE_MIDAMBLE_RX_MAX_NSTS_DEF 0 + #define WNI_CFG_HE_LTF_NDP_STAMIN 0 #define WNI_CFG_HE_LTF_NDP_STAMAX 0x3 #define WNI_CFG_HE_LTF_NDP_STADEF 0 @@ -1621,6 +1636,26 @@ enum { #define WNI_CFG_HE_ER_4x_LTF_GI_STAMAX 1 #define WNI_CFG_HE_ER_4x_LTF_GI_STADEF 0 +#define WNI_CFG_HE_PPDU_20_IN_40MHZ_2G_MIN 0 +#define WNI_CFG_HE_PPDU_20_IN_40MHZ_2G_MAX 1 +#define WNI_CFG_HE_PPDU_20_IN_40MHZ_2G_DEF 0 + +#define WNI_CFG_HE_PPDU_20_IN_160_80P80MHZ_MIN 0 +#define WNI_CFG_HE_PPDU_20_IN_160_80P80MHZ_MAX 1 +#define WNI_CFG_HE_PPDU_20_IN_160_80P80MHZ_DEF 0 + +#define WNI_CFG_HE_PPDU_80_IN_160_80P80MHZ_MIN 0 +#define WNI_CFG_HE_PPDU_80_IN_160_80P80MHZ_MAX 1 +#define WNI_CFG_HE_PPDU_80_IN_160_80P80MHZ_DEF 0 + +#define WNI_CFG_HE_ER_1X_HE_LTF_GI_MIN 0 +#define WNI_CFG_HE_ER_1X_HE_LTF_GI_MAX 1 +#define WNI_CFG_HE_ER_1X_HE_LTF_GI_DEF 0 + +#define WNI_CFG_HE_MIDAMBLE_RX_1X_HE_LTF_MIN 0 +#define WNI_CFG_HE_MIDAMBLE_RX_1X_HE_LTF_MAX 1 +#define WNI_CFG_HE_MIDAMBLE_RX_1X_HE_LTF_DEF 0 + #define WNI_CFG_HE_RX_MCS_MAP_LT_80_MIN 0x0000 #define WNI_CFG_HE_RX_MCS_MAP_LT_80_MAX 0xFFFF #define WNI_CFG_HE_RX_MCS_MAP_LT_80_DEF 0xFFF0 diff --git a/core/mac/src/cfg/cfg_proc_msg.c b/core/mac/src/cfg/cfg_proc_msg.c index 620e83f8436b..4bdcbb15947a 100644 --- a/core/mac/src/cfg/cfg_proc_msg.c +++ b/core/mac/src/cfg/cfg_proc_msg.c @@ -1268,6 +1268,11 @@ cgstatic cfg_static[CFG_PARAM_MAX_NUM] = { WNI_CFG_HE_NDP_FEEDBACK_SUPP_STAMIN, WNI_CFG_HE_NDP_FEEDBACK_SUPP_STAMAX, WNI_CFG_HE_NDP_FEEDBACK_SUPP_STADEF}, + {WNI_CFG_HE_AMSDU_IN_AMPDU, + CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT, + WNI_CFG_HE_AMSDU_IN_AMPDU_MIN, + WNI_CFG_HE_AMSDU_IN_AMPDU_MAX, + WNI_CFG_HE_AMSDU_IN_AMPDU_DEF}, {WNI_CFG_HE_A_BQR, CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT, WNI_CFG_HE_A_BQR_STAMIN, WNI_CFG_HE_A_BQR_STAMAX, @@ -1296,6 +1301,11 @@ cgstatic cfg_static[CFG_PARAM_MAX_NUM] = { CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT, WNI_CFG_HE_LTF_PPDU_STAMIN, WNI_CFG_HE_LTF_PPDU_STAMAX, WNI_CFG_HE_LTF_PPDU_STADEF}, + {WNI_CFG_HE_MIDAMBLE_RX_MAX_NSTS, + CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT, + WNI_CFG_HE_MIDAMBLE_RX_MAX_NSTS_MIN, + WNI_CFG_HE_MIDAMBLE_RX_MAX_NSTS_MAX, + WNI_CFG_HE_MIDAMBLE_RX_MAX_NSTS_DEF}, {WNI_CFG_HE_LTF_NDP, CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT, WNI_CFG_HE_LTF_NDP_STAMIN, WNI_CFG_HE_LTF_NDP_STAMAX, @@ -1410,6 +1420,30 @@ cgstatic cfg_static[CFG_PARAM_MAX_NUM] = { WNI_CFG_HE_ER_4x_LTF_GI_STAMIN, WNI_CFG_HE_ER_4x_LTF_GI_STAMAX, WNI_CFG_HE_ER_4x_LTF_GI_STADEF}, + {WNI_CFG_HE_PPDU_20_IN_40MHZ_2G, + CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT, + WNI_CFG_HE_PPDU_20_IN_40MHZ_2G_MIN, WNI_CFG_HE_PPDU_20_IN_40MHZ_2G_MAX, + WNI_CFG_HE_PPDU_20_IN_40MHZ_2G_DEF}, + {WNI_CFG_HE_PPDU_20_IN_160_80P80MHZ, + CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT, + WNI_CFG_HE_PPDU_20_IN_160_80P80MHZ_MIN, + WNI_CFG_HE_PPDU_20_IN_160_80P80MHZ_MAX, + WNI_CFG_HE_PPDU_20_IN_160_80P80MHZ_DEF}, + {WNI_CFG_HE_PPDU_80_IN_160_80P80MHZ, + CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT, + WNI_CFG_HE_PPDU_80_IN_160_80P80MHZ_MIN, + WNI_CFG_HE_PPDU_80_IN_160_80P80MHZ_MAX, + WNI_CFG_HE_PPDU_80_IN_160_80P80MHZ_DEF}, + {WNI_CFG_HE_ER_1X_HE_LTF_GI, + CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT, + WNI_CFG_HE_ER_1X_HE_LTF_GI_MIN, WNI_CFG_HE_ER_1X_HE_LTF_GI_MAX, + WNI_CFG_HE_ER_1X_HE_LTF_GI_DEF}, + {WNI_CFG_HE_MIDAMBLE_RX_1X_HE_LTF, + CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT, + WNI_CFG_HE_MIDAMBLE_RX_1X_HE_LTF_MIN, + WNI_CFG_HE_MIDAMBLE_RX_1X_HE_LTF_MAX, + WNI_CFG_HE_MIDAMBLE_RX_1X_HE_LTF_DEF}, + {WNI_CFG_HE_RX_MCS_MAP_LT_80, CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT, WNI_CFG_HE_RX_MCS_MAP_LT_80_MIN, WNI_CFG_HE_RX_MCS_MAP_LT_80_MAX, diff --git a/core/mac/src/pe/lim/lim_utils.c b/core/mac/src/pe/lim/lim_utils.c index 5d1da657fd61..1096d350d2af 100644 --- a/core/mac/src/pe/lim/lim_utils.c +++ b/core/mac/src/pe/lim/lim_utils.c @@ -7459,6 +7459,7 @@ void lim_log_he_cap(tpAniSirGlobal mac, tDot11fIEhe_cap *he_cap) pe_debug("\tSR Reponder support: 0x%01x", he_cap->sr_responder); pe_debug("\tNDP Feedback support: 0x%01x", he_cap->ndp_feedback_supp); pe_debug("\tOPS support: 0x%01x", he_cap->ops_supp); + pe_debug("\tOPS support: 0x%01x", he_cap->amsdu_in_ampdu); /* HE PHY capabilities */ pe_debug("\tDual band support: 0x%01x", he_cap->dual_band); @@ -7475,6 +7476,8 @@ void lim_log_he_cap(tpAniSirGlobal mac, tDot11fIEhe_cap *he_cap) he_cap->ldpc_coding); pe_debug("\tLTF and GI for HE PPDUs: 0x%02x", he_cap->he_1x_ltf_800_gi_ppdu); + pe_debug("\tMidamble Rx MAX NSTS: 0x%02x", + he_cap->midamble_rx_max_nsts); pe_debug("\tLTF and GI for NDP: 0x%02x", he_cap->he_4x_ltf_3200_gi_ndp); pe_debug("\tSTBC Tx & Rx support (<= 80MHz): 0x%02x", @@ -7518,7 +7521,16 @@ void lim_log_he_cap(tpAniSirGlobal mac, tDot11fIEhe_cap *he_cap) he_cap->stbc_gt_80mhz); pe_debug("\tMax Nc: 0x%03x", he_cap->max_nc); pe_debug("\tER 4x HE LTF support: 0x%01x", he_cap->er_he_ltf_800_gi_4x); - + pe_debug("\tER 4x HE LTF support: 0x%01x", + he_cap->he_ppdu_20_in_40Mhz_2G); + pe_debug("\tER 4x HE LTF support: 0x%01x", + he_cap->he_ppdu_20_in_160_80p80Mhz); + pe_debug("\tER 4x HE LTF support: 0x%01x", + he_cap->he_ppdu_80_in_160_80p80Mhz); + pe_debug("\tER 4x HE LTF support: 0x%01x", + he_cap->er_1x_he_ltf_gi); + pe_debug("\tER 4x HE LTF support: 0x%01x", + he_cap->midamble_rx_1x_he_ltf); pe_debug("\tRx MCS map for <= 80 Mhz: 0x%04x", he_cap->rx_he_mcs_map_lt_80); pe_debug("\tTx MCS map for <= 80 Mhz: 0x%04x", @@ -7651,6 +7663,7 @@ void lim_set_he_caps(tpAniSirGlobal mac, tpPESession session, uint8_t *ie_start, he_cap->sr_responder = dot11_cap.sr_responder; he_cap->ops_supp = dot11_cap.ops_supp; he_cap->ndp_feedback_supp = dot11_cap.ndp_feedback_supp; + he_cap->amsdu_in_ampdu = dot11_cap.amsdu_in_ampdu; he_cap->reserved1 = dot11_cap.reserved1; he_cap->dual_band = dot11_cap.dual_band; @@ -7664,6 +7677,7 @@ void lim_set_he_caps(tpAniSirGlobal mac, tpPESession session, uint8_t *ie_start, he_cap->device_class = dot11_cap.device_class; he_cap->ldpc_coding = dot11_cap.ldpc_coding; he_cap->he_1x_ltf_800_gi_ppdu = dot11_cap.he_1x_ltf_800_gi_ppdu; + he_cap->midamble_rx_max_nsts = dot11_cap.midamble_rx_max_nsts; he_cap->he_4x_ltf_3200_gi_ndp = dot11_cap.he_4x_ltf_3200_gi_ndp; he_cap->stbc_lt_80mhz = dot11_cap.stbc_lt_80mhz; he_cap->stbc_gt_80mhz = dot11_cap.stbc_gt_80mhz; @@ -7694,6 +7708,16 @@ void lim_set_he_caps(tpAniSirGlobal mac, tpPESession session, uint8_t *ie_start, he_cap->he_ltf_800_gi_4x = dot11_cap.he_ltf_800_gi_4x; he_cap->max_nc = dot11_cap.max_nc; he_cap->er_he_ltf_800_gi_4x = dot11_cap.er_he_ltf_800_gi_4x; + he_cap->he_ppdu_20_in_40Mhz_2G = + dot11_cap.he_ppdu_20_in_40Mhz_2G; + he_cap->he_ppdu_20_in_160_80p80Mhz = + dot11_cap.he_ppdu_20_in_160_80p80Mhz; + he_cap->he_ppdu_80_in_160_80p80Mhz = + dot11_cap.he_ppdu_80_in_160_80p80Mhz; + he_cap->er_1x_he_ltf_gi = + dot11_cap.er_1x_he_ltf_gi; + he_cap->midamble_rx_1x_he_ltf = + dot11_cap.midamble_rx_1x_he_ltf; he_cap->reserved2 = dot11_cap.reserved2; he_cap->rx_he_mcs_map_lt_80 = dot11_cap.rx_he_mcs_map_lt_80; diff --git a/core/mac/src/sys/legacy/src/utils/src/parser_api.c b/core/mac/src/sys/legacy/src/utils/src/parser_api.c index 63578cef0160..4ba71c168114 100644 --- a/core/mac/src/sys/legacy/src/utils/src/parser_api.c +++ b/core/mac/src/sys/legacy/src/utils/src/parser_api.c @@ -6114,6 +6114,8 @@ QDF_STATUS populate_dot11f_he_caps(tpAniSirGlobal mac_ctx, tpPESession session, he_cap->ndp_feedback_supp = value; CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_OPS_SUPP, value); he_cap->ops_supp = value; + CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_AMSDU_IN_AMPDU, value); + he_cap->amsdu_in_ampdu = value; CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_DUAL_BAND, value); he_cap->dual_band = value; @@ -6134,6 +6136,9 @@ QDF_STATUS populate_dot11f_he_caps(tpAniSirGlobal mac_ctx, tpPESession session, he_cap->ldpc_coding = value; CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_LTF_PPDU, value); he_cap->he_1x_ltf_800_gi_ppdu = value; + CFG_GET_INT(status, mac_ctx, + WNI_CFG_HE_MIDAMBLE_RX_MAX_NSTS, value); + he_cap->midamble_rx_max_nsts = value; CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_LTF_NDP, value); he_cap->he_4x_ltf_3200_gi_ndp = value; CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_STBC_LT80, value); @@ -6190,7 +6195,20 @@ QDF_STATUS populate_dot11f_he_caps(tpAniSirGlobal mac_ctx, tpPESession session, he_cap->stbc_gt_80mhz = value; CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_ER_4x_LTF_GI, value); he_cap->er_he_ltf_800_gi_4x = value; - + CFG_GET_INT(status, mac_ctx, + WNI_CFG_HE_PPDU_20_IN_40MHZ_2G, value); + he_cap->he_ppdu_20_in_40Mhz_2G = value; + CFG_GET_INT(status, mac_ctx, + WNI_CFG_HE_PPDU_20_IN_160_80P80MHZ, value); + he_cap->he_ppdu_20_in_160_80p80Mhz = value; + CFG_GET_INT(status, mac_ctx, + WNI_CFG_HE_PPDU_80_IN_160_80P80MHZ, value); + he_cap->he_ppdu_80_in_160_80p80Mhz = value; + CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_ER_1X_HE_LTF_GI, value); + he_cap->er_1x_he_ltf_gi = value; + CFG_GET_INT(status, mac_ctx, + WNI_CFG_HE_MIDAMBLE_RX_1X_HE_LTF, value); + he_cap->midamble_rx_1x_he_ltf = value; CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_RX_MCS_MAP_LT_80, value); he_cap->rx_he_mcs_map_lt_80 = value; diff --git a/core/sme/src/csr/csr_api_roam.c b/core/sme/src/csr/csr_api_roam.c index 28524830aebf..8765862d3d85 100644 --- a/core/sme/src/csr/csr_api_roam.c +++ b/core/sme/src/csr/csr_api_roam.c @@ -2325,6 +2325,8 @@ static void csr_update_session_he_cap(tpAniSirGlobal mac_ctx, he_cap->ndp_feedback_supp = value; sme_cfg_get_int(mac_ctx, WNI_CFG_HE_OPS_SUPP, &value); he_cap->ops_supp = value; + sme_cfg_get_int(mac_ctx, WNI_CFG_HE_AMSDU_IN_AMPDU, &value); + he_cap->amsdu_in_ampdu = value; sme_cfg_get_int(mac_ctx, WNI_CFG_HE_DUAL_BAND, &value); he_cap->dual_band = value; @@ -2345,6 +2347,8 @@ static void csr_update_session_he_cap(tpAniSirGlobal mac_ctx, he_cap->ldpc_coding = value; sme_cfg_get_int(mac_ctx, WNI_CFG_HE_LTF_PPDU, &value); he_cap->he_1x_ltf_800_gi_ppdu = value; + sme_cfg_get_int(mac_ctx, WNI_CFG_HE_MIDAMBLE_RX_MAX_NSTS, &value); + he_cap->midamble_rx_max_nsts = value; sme_cfg_get_int(mac_ctx, WNI_CFG_HE_LTF_NDP, &value); he_cap->he_4x_ltf_3200_gi_ndp = value; sme_cfg_get_int(mac_ctx, WNI_CFG_HE_STBC_LT80, &value); @@ -2401,7 +2405,16 @@ static void csr_update_session_he_cap(tpAniSirGlobal mac_ctx, he_cap->stbc_gt_80mhz = value; sme_cfg_get_int(mac_ctx, WNI_CFG_HE_ER_4x_LTF_GI, &value); he_cap->er_he_ltf_800_gi_4x = value; - + sme_cfg_get_int(mac_ctx, WNI_CFG_HE_PPDU_20_IN_40MHZ_2G, &value); + he_cap->he_ppdu_20_in_40Mhz_2G = value; + sme_cfg_get_int(mac_ctx, WNI_CFG_HE_PPDU_20_IN_160_80P80MHZ, &value); + he_cap->he_ppdu_20_in_160_80p80Mhz = value; + sme_cfg_get_int(mac_ctx, WNI_CFG_HE_PPDU_80_IN_160_80P80MHZ, &value); + he_cap->he_ppdu_80_in_160_80p80Mhz = value; + sme_cfg_get_int(mac_ctx, WNI_CFG_HE_ER_1X_HE_LTF_GI, &value); + he_cap->er_1x_he_ltf_gi = value; + sme_cfg_get_int(mac_ctx, WNI_CFG_HE_MIDAMBLE_RX_1X_HE_LTF, &value); + he_cap->midamble_rx_1x_he_ltf = value; sme_cfg_get_int(mac_ctx, WNI_CFG_HE_RX_MCS_MAP_LT_80, &value); he_cap->rx_he_mcs_map_lt_80 = value; sme_cfg_get_int(mac_ctx, WNI_CFG_HE_TX_MCS_MAP_LT_80, &value); diff --git a/core/wma/src/wma_he.c b/core/wma/src/wma_he.c index da69cc8317e3..dc09d6c92b40 100644 --- a/core/wma/src/wma_he.c +++ b/core/wma/src/wma_he.c @@ -232,7 +232,7 @@ static void wma_convert_he_cap(tDot11fIEhe_cap *he_cap, uint32_t mac_cap, he_cap->sr_responder = WMI_HECAP_MAC_SRRESP_GET(mac_cap); he_cap->ndp_feedback_supp = WMI_HECAP_MAC_NDPFDBKRPT_GET(mac_cap); he_cap->ops_supp = WMI_HECAP_MAC_OPS_GET(mac_cap); - + he_cap->amsdu_in_ampdu = WMI_HECAP_MAC_AMSDUINAMPDU_GET(mac_cap); /* HE PHY capabilities */ he_cap->dual_band = WMI_HECAP_PHY_DB_GET(phy_cap); chan_width = WMI_HECAP_PHY_CBW_GET(phy_cap); @@ -247,6 +247,8 @@ static void wma_convert_he_cap(tDot11fIEhe_cap *he_cap, uint32_t mac_cap, he_cap->device_class = WMI_HECAP_PHY_COD_GET(phy_cap); he_cap->ldpc_coding = WMI_HECAP_PHY_LDPC_GET(phy_cap); he_cap->he_1x_ltf_800_gi_ppdu = WMI_HECAP_PHY_LTFGIFORHE_GET(phy_cap); + he_cap->midamble_rx_max_nsts = + WMI_HECAP_PHY_MIDAMBLERXMAXNSTS_GET(phy_cap); he_cap->he_4x_ltf_3200_gi_ndp = WMI_HECAP_PHY_LTFGIFORNDP_GET(phy_cap); he_cap->stbc_lt_80mhz = (WMI_HECAP_PHY_RXSTBC_GET(phy_cap) << 1) | WMI_HECAP_PHY_TXSTBC_GET(phy_cap); @@ -286,6 +288,15 @@ static void wma_convert_he_cap(tDot11fIEhe_cap *he_cap, uint32_t mac_cap, he_cap->max_nc = WMI_HECAP_PHY_MAXNC_GET(phy_cap); he_cap->er_he_ltf_800_gi_4x = WMI_HECAP_PHY_ERSU4X800NSECGI_GET(phy_cap); + he_cap->he_ppdu_20_in_40Mhz_2G = + WMI_HECAP_PHY_HEPPDU20IN40MHZ2G_GET(phy_cap); + he_cap->he_ppdu_20_in_160_80p80Mhz = + WMI_HECAP_PHY_HEPPDU20IN160OR80P80MHZ_GET(phy_cap); + he_cap->he_ppdu_80_in_160_80p80Mhz = + WMI_HECAP_PHY_HEPPDU80IN160OR80P80MHZ_GET(phy_cap); + he_cap->er_1x_he_ltf_gi = WMI_HECAP_PHY_ERSU1X800NSECGI_GET(phy_cap); + he_cap->midamble_rx_1x_he_ltf = + WMI_HECAP_PHY_MIDAMBLERX2XAND1XHELTF_GET(phy_cap); /* * supp_mcs is split into 16 bits with lower indicating le_80 and @@ -388,6 +399,13 @@ static void wma_derive_ext_he_cap(t_wma_handle *wma_handle, new_cap->bsrp_ampdu_aggr); he_cap->qtp = QDF_MIN(he_cap->qtp, new_cap->qtp); he_cap->a_bqr = QDF_MIN(he_cap->a_bqr, new_cap->a_bqr); + he_cap->sr_responder = QDF_MIN(he_cap->sr_responder, + new_cap->sr_responder); + he_cap->ndp_feedback_supp = QDF_MIN(he_cap->ndp_feedback_supp, + new_cap->ndp_feedback_supp); + he_cap->ops_supp = QDF_MIN(he_cap->ops_supp, new_cap->ops_supp); + he_cap->amsdu_in_ampdu = QDF_MIN(he_cap->amsdu_in_ampdu, + new_cap->amsdu_in_ampdu); he_cap->reserved1 = QDF_MIN(he_cap->reserved1, new_cap->reserved1); @@ -419,6 +437,9 @@ static void wma_derive_ext_he_cap(t_wma_handle *wma_handle, he_cap->he_1x_ltf_800_gi_ppdu = QDF_MIN(he_cap->he_1x_ltf_800_gi_ppdu, new_cap->he_1x_ltf_800_gi_ppdu); + he_cap->midamble_rx_max_nsts = + QDF_MIN(he_cap->midamble_rx_max_nsts, + new_cap->midamble_rx_max_nsts); he_cap->he_4x_ltf_3200_gi_ndp = QDF_MIN(he_cap->he_4x_ltf_3200_gi_ndp, new_cap->he_4x_ltf_3200_gi_ndp); @@ -468,6 +489,23 @@ static void wma_derive_ext_he_cap(t_wma_handle *wma_handle, new_cap->power_boost); he_cap->he_ltf_800_gi_4x = QDF_MIN(he_cap->he_ltf_800_gi_4x, new_cap->he_ltf_800_gi_4x); + he_cap->er_he_ltf_800_gi_4x = + QDF_MIN(he_cap->er_he_ltf_800_gi_4x, + new_cap->er_he_ltf_800_gi_4x); + he_cap->he_ppdu_20_in_40Mhz_2G = + QDF_MIN(he_cap->he_ppdu_20_in_40Mhz_2G, + new_cap->he_ppdu_20_in_40Mhz_2G); + he_cap->he_ppdu_20_in_160_80p80Mhz = + QDF_MIN(he_cap->he_ppdu_20_in_160_80p80Mhz, + new_cap->he_ppdu_20_in_160_80p80Mhz); + he_cap->he_ppdu_80_in_160_80p80Mhz = + QDF_MIN(he_cap->he_ppdu_80_in_160_80p80Mhz, + new_cap->he_ppdu_80_in_160_80p80Mhz); + he_cap->er_1x_he_ltf_gi = QDF_MIN(he_cap->er_1x_he_ltf_gi, + new_cap->er_1x_he_ltf_gi); + he_cap->midamble_rx_1x_he_ltf = + QDF_MIN(he_cap->midamble_rx_1x_he_ltf, + new_cap->midamble_rx_1x_he_ltf); he_cap->reserved2 = QDF_MIN(he_cap->reserved2, new_cap->reserved2); @@ -537,6 +575,10 @@ void wma_print_he_cap(tDot11fIEhe_cap *he_cap) WMA_LOGD("\tBSRP A-MPDU Aggregation: 0x%01x", he_cap->bsrp_ampdu_aggr); WMA_LOGD("\tQuite Time Period support: 0x%01x", he_cap->qtp); WMA_LOGD("\tA-BQR support: 0x%01x", he_cap->a_bqr); + WMA_LOGD("\t SR Responder: 0x%01x", he_cap->sr_responder); + WMA_LOGD("\t ndp feedback supp: 0x%01x", he_cap->ndp_feedback_supp); + WMA_LOGD("\t ops supp: 0x%01x", he_cap->ops_supp); + WMA_LOGD("\t amsdu in ampdu: 0x%01x", he_cap->amsdu_in_ampdu); /* HE PHY capabilities */ WMA_LOGD("\tDual band support: 0x%01x", he_cap->dual_band); @@ -552,6 +594,8 @@ void wma_print_he_cap(tDot11fIEhe_cap *he_cap) WMA_LOGD("\tLDPC coding support: 0x%01x", he_cap->ldpc_coding); WMA_LOGD("\tLTF and GI for HE PPDUs: 0x%02x", he_cap->he_1x_ltf_800_gi_ppdu); + WMA_LOGD("\tMidamble Rx MAX NSTS: 0x%02x", + he_cap->midamble_rx_max_nsts); WMA_LOGD("\tLTF and GI for NDP: 0x%02x", he_cap->he_4x_ltf_3200_gi_ndp); WMA_LOGD("\tSTBC Tx & Rx support: 0x%02x", he_cap->stbc_lt_80mhz); WMA_LOGD("\tDoppler support: 0x%02x", he_cap->doppler); @@ -586,6 +630,19 @@ void wma_print_he_cap(tDot11fIEhe_cap *he_cap) WMA_LOGD("\tPower boost factor: 0x%01x", he_cap->power_boost); WMA_LOGD("\t4x HE LTF support: 0x%01x", he_cap->he_ltf_800_gi_4x); + WMA_LOGD("\tMax NC: 0x%01x", he_cap->max_nc); + WMA_LOGD("\tstbc gt 80mhz: 0x%01x", he_cap->stbc_gt_80mhz); + WMA_LOGD("\ter_he_ltf_800_gi_4x: 0x%01x", he_cap->er_he_ltf_800_gi_4x); + WMA_LOGD("\the_ppdu_20_in_40Mhz_2G: 0x%01x", + he_cap->he_ppdu_20_in_40Mhz_2G); + WMA_LOGD("\the_ppdu_20_in_160_80p80Mhz: 0x%01x", + he_cap->he_ppdu_20_in_160_80p80Mhz); + WMA_LOGD("\the_ppdu_80_in_160_80p80Mhz: 0x%01x", + he_cap->he_ppdu_80_in_160_80p80Mhz); + WMA_LOGD("\ter_1x_he_ltf_gi: 0x%01x", + he_cap->er_1x_he_ltf_gi); + WMA_LOGD("\tmidamble_rx_1x_he_ltf: 0x%01x", + he_cap->midamble_rx_1x_he_ltf); WMA_LOGD("\tRx MCS MAP for BW <= 80 MHz: 0x%x", he_cap->rx_he_mcs_map_lt_80); WMA_LOGD("\tTx MCS MAP for BW <= 80 MHz: 0x%x", @@ -1033,6 +1090,7 @@ void wma_populate_peer_he_cap(struct peer_assoc_params *peer, WMI_HECAP_MAC_SRRESP_SET(mac_cap, he_cap->sr_responder); WMI_HECAP_MAC_OPS_SET(mac_cap, he_cap->ops_supp); WMI_HECAP_MAC_NDPFDBKRPT_SET(mac_cap, he_cap->ndp_feedback_supp); + WMI_HECAP_MAC_AMSDUINAMPDU_SET(mac_cap, he_cap->amsdu_in_ampdu); peer->peer_he_cap_macinfo = mac_cap; /* HE PHY capabilities */ @@ -1046,6 +1104,8 @@ void wma_populate_peer_he_cap(struct peer_assoc_params *peer, WMI_HECAP_PHY_COD_SET(phy_cap, he_cap->device_class); WMI_HECAP_PHY_LDPC_SET(phy_cap, he_cap->ldpc_coding); WMI_HECAP_PHY_LTFGIFORHE_SET(phy_cap, he_cap->he_1x_ltf_800_gi_ppdu); + WMI_HECAP_PHY_MIDAMBLERXMAXNSTS_SET(phy_cap, + he_cap->midamble_rx_max_nsts); WMI_HECAP_PHY_LTFGIFORNDP_SET(phy_cap, he_cap->he_4x_ltf_3200_gi_ndp); temp = he_cap->stbc_lt_80mhz & 0x1; @@ -1096,6 +1156,15 @@ void wma_populate_peer_he_cap(struct peer_assoc_params *peer, WMI_HECAP_PHY_STBCTXGT80_SET(phy_cap, temp); WMI_HECAP_PHY_ERSU4X800NSECGI_SET(phy_cap, he_cap->er_he_ltf_800_gi_4x); + WMI_HECAP_PHY_HEPPDU20IN40MHZ2G_SET(phy_cap, + he_cap->he_ppdu_20_in_40Mhz_2G); + WMI_HECAP_PHY_HEPPDU20IN160OR80P80MHZ_SET(phy_cap, + he_cap->he_ppdu_20_in_160_80p80Mhz); + WMI_HECAP_PHY_HEPPDU80IN160OR80P80MHZ_SET(phy_cap, + he_cap->he_ppdu_80_in_160_80p80Mhz); + WMI_HECAP_PHY_ERSU1X800NSECGI_SET(phy_cap, he_cap->er_1x_he_ltf_gi); + WMI_HECAP_PHY_MIDAMBLERX2XAND1XHELTF_SET(phy_cap, + he_cap->midamble_rx_1x_he_ltf); /* as per 11ax draft 1.4 */ peer->peer_he_mcs_count = 1;