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msm: kgsl: Add addr_mode_cntl registers for legacy snapshot for holi gpu

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Add ADDR_MODE_CNTL registers for HLSQ, SP, TPL1 for legacy snapshot for
holi gpu to dump registers from the host driven path. This will help to
read value of addr_mode_cntl for these blocks when crash dumper is not
used or it is timed out.

Change-Id: Id1898883aa59c97ed61e616b5a4a2e744c35292b
Signed-off-by: Indira Biruduraju <ibirudur@codeaurora.org>
This commit is contained in:
Indira Biruduraju 2020-10-30 11:24:08 +05:30
commit fca32c53c2
1 changed files with 10 additions and 0 deletions
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10
drivers/gpu/msm/adreno_a6xx_snapshot.c
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@ -304,6 +304,10 @@ static const unsigned int a660_registers[] = {
0x0B00, 0x0B40, 0x0B80, 0x0B83,
};
static const unsigned int a619_holi_registers[] = {
/* HLSQ, SP, TPL1 */
0xAE00, 0xAE01, 0xBE04, 0xBE05, 0xB600, 0xB601,
};
/*
* Set of registers to dump for A6XX before actually triggering crash dumper.
* Registers in pairs - first value is the start offset, second
@ -1826,6 +1830,12 @@ void a6xx_snapshot(struct adreno_device *adreno_dev,
snapshot, a6xx_snapshot_registers, &a6xx_reg_list[i]);
}
if (adreno_is_a619_holi(adreno_dev) && !crash_dump_valid) {
adreno_snapshot_registers(device, snapshot,
a619_holi_registers,
ARRAY_SIZE(a619_holi_registers) / 2);
}
/* CP_SQE indexed registers */
kgsl_snapshot_indexed_registers(device, snapshot,
A6XX_CP_SQE_STAT_ADDR, A6XX_CP_SQE_STAT_DATA, 0, 0x33);