From fd39fc40c7fe18888c3f0489315221016b8c4b6a Mon Sep 17 00:00:00 2001 From: Shreyas K K Date: Mon, 20 Jul 2020 11:33:57 +0530 Subject: [PATCH] ARM: dts: msm: Add initial device tree for SA6155 Add initial device tree to support SA6155 chipset on automotive platforms. Change-Id: I27ea3d0a1972fa852298af07f13464e717900af1 --- bindings/arm/msm/msm.txt | 6 + bindings/clock/qcom,rpmh-clk.txt | 1 + qcom/Makefile | 30 + qcom/sa6155-adp-air-overlay.dts | 11 + qcom/sa6155-adp-air.dts | 10 + qcom/sa6155-adp-air.dtsi | 1 + qcom/sa6155-adp-common.dtsi | 5 + qcom/sa6155-adp-star-overlay.dts | 11 + qcom/sa6155-adp-star.dts | 9 + qcom/sa6155-adp-star.dtsi | 1 + qcom/sa6155.dts | 9 + qcom/sa6155.dtsi | 8 + qcom/sa6155p-adp-air-overlay.dts | 11 + qcom/sa6155p-adp-air.dts | 10 + qcom/sa6155p-adp-star-lpass-overlay.dts | 12 + qcom/sa6155p-adp-star-lpass.dts | 12 + qcom/sa6155p-adp-star-overlay.dts | 11 + qcom/sa6155p-adp-star.dts | 10 + qcom/sa6155p-v2-adp-air-lpass-overlay.dts | 11 + qcom/sa6155p-v2-adp-air-lpass.dts | 12 + qcom/sa6155p-v2-adp-air-overlay.dts | 11 + qcom/sa6155p-v2-adp-air.dts | 10 + qcom/sa6155p-v2-adp-star-overlay.dts | 11 + qcom/sa6155p-v2-adp-star.dts | 10 + qcom/sa6155p.dts | 9 + qcom/sa6155p.dtsi | 7 + qcom/sm6150-qupv3.dtsi | 18 + qcom/sm6150.dts | 10 + qcom/sm6150.dtsi | 682 ++++++++++++++++++++++ qcom/sm6150p.dts | 10 + qcom/sm6150p.dtsi | 7 + 31 files changed, 976 insertions(+) create mode 100644 qcom/sa6155-adp-air-overlay.dts create mode 100644 qcom/sa6155-adp-air.dts create mode 100644 qcom/sa6155-adp-air.dtsi create mode 100644 qcom/sa6155-adp-common.dtsi create mode 100644 qcom/sa6155-adp-star-overlay.dts create mode 100644 qcom/sa6155-adp-star.dts create mode 100644 qcom/sa6155-adp-star.dtsi create mode 100644 qcom/sa6155.dts create mode 100644 qcom/sa6155.dtsi create mode 100644 qcom/sa6155p-adp-air-overlay.dts create mode 100644 qcom/sa6155p-adp-air.dts create mode 100644 qcom/sa6155p-adp-star-lpass-overlay.dts create mode 100644 qcom/sa6155p-adp-star-lpass.dts create mode 100644 qcom/sa6155p-adp-star-overlay.dts create mode 100644 qcom/sa6155p-adp-star.dts create mode 100644 qcom/sa6155p-v2-adp-air-lpass-overlay.dts create mode 100644 qcom/sa6155p-v2-adp-air-lpass.dts create mode 100644 qcom/sa6155p-v2-adp-air-overlay.dts create mode 100644 qcom/sa6155p-v2-adp-air.dts create mode 100644 qcom/sa6155p-v2-adp-star-overlay.dts create mode 100644 qcom/sa6155p-v2-adp-star.dts create mode 100644 qcom/sa6155p.dts create mode 100644 qcom/sa6155p.dtsi create mode 100644 qcom/sm6150-qupv3.dtsi create mode 100644 qcom/sm6150.dts create mode 100644 qcom/sm6150.dtsi create mode 100644 qcom/sm6150p.dts create mode 100644 qcom/sm6150p.dtsi diff --git a/bindings/arm/msm/msm.txt b/bindings/arm/msm/msm.txt index 5274f24ffb56..9e6bd7969c74 100644 --- a/bindings/arm/msm/msm.txt +++ b/bindings/arm/msm/msm.txt @@ -239,6 +239,12 @@ compatible = "qcom,sm6150-mtp" compatible = "qcom,sm6150-cdp" compatible = "qcom,sm6150-qrd" compatible = "qcom,sm6150-idp" +compatible = "qcom,sm6150p" +compatible = "qcom,sa6155-adp-star" +compatible = "qcom,sa6155p-adp-star" +compatible = "qcom,sa6155p" +compatible = "qcom,sa6155-adp-air" +compatible = "qcom,sa6155p-adp-air" compatible = "qcom,qcs405-rumi" compatible = "qcom,qcs405-iot" compatible = "qcom,qcs403-iot" diff --git a/bindings/clock/qcom,rpmh-clk.txt b/bindings/clock/qcom,rpmh-clk.txt index 2f8d511d701f..877068e9a435 100644 --- a/bindings/clock/qcom,rpmh-clk.txt +++ b/bindings/clock/qcom,rpmh-clk.txt @@ -12,6 +12,7 @@ Required properties : "qcom,kona-rpmh-clk", "qcom,sdm845-rpmh-clk" "qcom,sm8150-rpmh-clk" + "qcom,sm6150-rpmh-clk" "qcom,sdxlemur-rpmh-clk" "qcom,yupik-rpmh-clk" diff --git a/qcom/Makefile b/qcom/Makefile index 543aa180dcd1..cdb2f2bf458a 100644 --- a/qcom/Makefile +++ b/qcom/Makefile @@ -184,6 +184,36 @@ dtb-$(CONFIG_ARCH_SA8155) += sa8155-adp-star.dtb \ sa8155p-v2-adp-air.dtb endif +ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y) + dtbo-$(CONFIG_ARCH_SA6155) += \ + sa6155-adp-star-overlay.dtbo \ + sa6155p-adp-star-overlay.dtbo \ + sa6155p-adp-star-lpass-overlay.dtbo \ + sa6155-adp-air-overlay.dtbo \ + sa6155p-adp-air-overlay.dtbo \ + sa6155p-v2-adp-star-overlay.dtbo \ + sa6155p-v2-adp-air-overlay.dtbo \ + sa6155p-v2-adp-air-lpass-overlay.dtbo + +sa6155-adp-star-overlay.dtbo-base := sa6155.dtb +sa6155p-adp-star-overlay.dtbo-base := sa6155p.dtb +sa6155p-adp-star-lpass-overlay.dtbo-base :=sa6155p.dtb +sa6155p-v2-adp-star-overlay.dtbo-base := sa6155p.dtb +sa6155-adp-air-overlay.dtbo-base := sa6155.dtb +sa6155p-adp-air-overlay.dtbo-base := sa6155p.dtb +sa6155p-v2-adp-air-overlay.dtbo-base := sa6155p.dtb +sa6155p-v2-adp-air-lpass-overlay.dtbo-base := sa6155p.dtb +else +dtb-$(CONFIG_ARCH_SA6155) += sa6155-adp-star.dtb \ + sa6155p-adp-star.dtb \ + sa6155p-adp-star-lpass.dtb \ + sa6155-adp-air.dtb \ + sa6155p-adp-air.dtb \ + sa6155p-v2-adp-star.dtb \ + sa6155p-v2-adp-air.dtb \ + sa6155p-v2-adp-air-lpass.dtb +endif + ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y) dtbo-$(CONFIG_ARCH_SA8195) += \ sa8195p-adp-star-overlay.dtbo \ diff --git a/qcom/sa6155-adp-air-overlay.dts b/qcom/sa6155-adp-air-overlay.dts new file mode 100644 index 000000000000..ae2cf1199a62 --- /dev/null +++ b/qcom/sa6155-adp-air-overlay.dts @@ -0,0 +1,11 @@ +/dts-v1/; +/plugin/; + +#include "sa6155-adp-air.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SA6155 ADP-AIR"; + compatible = "qcom,sa6155-adp-air", "qcom,sa6155", "qcom,adp-air"; + qcom,msm-id = <384 0x0>; + qcom,board-id = <0x03010019 0>; +}; diff --git a/qcom/sa6155-adp-air.dts b/qcom/sa6155-adp-air.dts new file mode 100644 index 000000000000..750e157d640b --- /dev/null +++ b/qcom/sa6155-adp-air.dts @@ -0,0 +1,10 @@ +/dts-v1/; + +#include "sa6155.dtsi" +#include "sa6155-adp-air.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SA6155 ADP-AIR"; + compatible = "qcom,sa6155-adp-air", "qcom,sa6155", "qcom,adp-air"; + qcom,board-id = <0x03010019 0>; +}; diff --git a/qcom/sa6155-adp-air.dtsi b/qcom/sa6155-adp-air.dtsi new file mode 100644 index 000000000000..91c1ac0cdf99 --- /dev/null +++ b/qcom/sa6155-adp-air.dtsi @@ -0,0 +1 @@ +#include "sa6155-adp-common.dtsi" diff --git a/qcom/sa6155-adp-common.dtsi b/qcom/sa6155-adp-common.dtsi new file mode 100644 index 000000000000..c2d9e07465c0 --- /dev/null +++ b/qcom/sa6155-adp-common.dtsi @@ -0,0 +1,5 @@ +#include + +&qupv3_0 { + status = "ok"; +}; diff --git a/qcom/sa6155-adp-star-overlay.dts b/qcom/sa6155-adp-star-overlay.dts new file mode 100644 index 000000000000..cd1c59523798 --- /dev/null +++ b/qcom/sa6155-adp-star-overlay.dts @@ -0,0 +1,11 @@ +/dts-v1/; +/plugin/; + +#include "sa6155-adp-star.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SA6155 ADP-STAR"; + compatible = "qcom,sa6155-adp-star", "qcom,sa6155", "qcom,adp-star"; + qcom,msm-id = <384 0x0>; + qcom,board-id = <0x010019 0>; +}; diff --git a/qcom/sa6155-adp-star.dts b/qcom/sa6155-adp-star.dts new file mode 100644 index 000000000000..d77e02ff960b --- /dev/null +++ b/qcom/sa6155-adp-star.dts @@ -0,0 +1,9 @@ +/dts-v1/; +#include "sa6155.dtsi" +#include "sa6155-adp-star.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SA6155 ADP-STAR"; + compatible = "qcom,sa6155-adp-star", "qcom,sa6155", "qcom,adp-star"; + qcom,board-id = <0x010019 0>; +}; diff --git a/qcom/sa6155-adp-star.dtsi b/qcom/sa6155-adp-star.dtsi new file mode 100644 index 000000000000..91c1ac0cdf99 --- /dev/null +++ b/qcom/sa6155-adp-star.dtsi @@ -0,0 +1 @@ +#include "sa6155-adp-common.dtsi" diff --git a/qcom/sa6155.dts b/qcom/sa6155.dts new file mode 100644 index 000000000000..a291137daa1b --- /dev/null +++ b/qcom/sa6155.dts @@ -0,0 +1,9 @@ +/dts-v1/; + +#include "sa6155.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SA6155 SoC"; + compatible = "qcom,sa6155"; + qcom,board-id = <0 0>; +}; diff --git a/qcom/sa6155.dtsi b/qcom/sa6155.dtsi new file mode 100644 index 000000000000..3306572750b1 --- /dev/null +++ b/qcom/sa6155.dtsi @@ -0,0 +1,8 @@ +#include "sm6150.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SA6155"; + compatible = "qcom,sa6155"; + qcom,msm-name = "SA6155"; + qcom,msm-id = <384 0x10000>; +}; diff --git a/qcom/sa6155p-adp-air-overlay.dts b/qcom/sa6155p-adp-air-overlay.dts new file mode 100644 index 000000000000..c584ca4a7946 --- /dev/null +++ b/qcom/sa6155p-adp-air-overlay.dts @@ -0,0 +1,11 @@ +/dts-v1/; +/plugin/; + +#include "sa6155-adp-air.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SA6155P ADP-AIR"; + compatible = "qcom,sa6155p-adp-air", "qcom,sa6155p", "qcom,adp-air"; + qcom,msm-id = <377 0x0>, <380 0>; + qcom,board-id = <0x03010019 0>; +}; diff --git a/qcom/sa6155p-adp-air.dts b/qcom/sa6155p-adp-air.dts new file mode 100644 index 000000000000..20c0b040210a --- /dev/null +++ b/qcom/sa6155p-adp-air.dts @@ -0,0 +1,10 @@ +/dts-v1/; + +#include "sa6155p.dtsi" +#include "sa6155-adp-air.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SA6155P ADP-AIR"; + compatible = "qcom,sa6155p-adp-air", "qcom,sa6155p", "qcom,adp-air"; + qcom,board-id = <0x03010019 0>; +}; diff --git a/qcom/sa6155p-adp-star-lpass-overlay.dts b/qcom/sa6155p-adp-star-lpass-overlay.dts new file mode 100644 index 000000000000..74aa69119ddc --- /dev/null +++ b/qcom/sa6155p-adp-star-lpass-overlay.dts @@ -0,0 +1,12 @@ +/dts-v1/; +/plugin/; + +#include "sa6155-adp-star.dtsi" + +/ { + model = "LPASS Audio PLL sourced from eMAC PPO ADP-Star"; + compatible = "qcom,sa6155p-adp-star", "qcom,sa6155p", "qcom,adp-star"; + qcom,msm-id = <377 0x0>, <380 0>; + qcom,board-id = <0x01010019 0>; +}; + diff --git a/qcom/sa6155p-adp-star-lpass.dts b/qcom/sa6155p-adp-star-lpass.dts new file mode 100644 index 000000000000..7615a0f40afe --- /dev/null +++ b/qcom/sa6155p-adp-star-lpass.dts @@ -0,0 +1,12 @@ +/dts-v1/; + +#include "sa6155p.dtsi" +#include "sa6155-adp-star.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SA6155P LPASS Audio PLL sourced + from eMAC PPO ADP-Star"; + compatible = "qcom,sa6155p-adp-star", "qcom,sa6155p", "qcom,adp-star"; + qcom,board-id = <0x01010019 0>; +}; + diff --git a/qcom/sa6155p-adp-star-overlay.dts b/qcom/sa6155p-adp-star-overlay.dts new file mode 100644 index 000000000000..0a49f5baca76 --- /dev/null +++ b/qcom/sa6155p-adp-star-overlay.dts @@ -0,0 +1,11 @@ +/dts-v1/; +/plugin/; + +#include "sa6155-adp-star.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SA6155P ADP-STAR"; + compatible = "qcom,sa6155p-adp-star", "qcom,sa6155p", "qcom,adp-star"; + qcom,msm-id = <377 0x0>, <380 0>; + qcom,board-id = <0x010019 0>; +}; diff --git a/qcom/sa6155p-adp-star.dts b/qcom/sa6155p-adp-star.dts new file mode 100644 index 000000000000..2ccdcf0a1278 --- /dev/null +++ b/qcom/sa6155p-adp-star.dts @@ -0,0 +1,10 @@ +/dts-v1/; + +#include "sa6155p.dtsi" +#include "sa6155-adp-star.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SA6155P ADP-STAR"; + compatible = "qcom,sa6155p-adp-star", "qcom,sa6155p", "qcom,adp-star"; + qcom,board-id = <0x010019 0>; +}; diff --git a/qcom/sa6155p-v2-adp-air-lpass-overlay.dts b/qcom/sa6155p-v2-adp-air-lpass-overlay.dts new file mode 100644 index 000000000000..e8b6ba202f7c --- /dev/null +++ b/qcom/sa6155p-v2-adp-air-lpass-overlay.dts @@ -0,0 +1,11 @@ +/dts-v1/; +/plugin/; + +#include "sa6155-adp-air.dtsi" + +/ { + model = "LPASS Audio PLL sourced from eMAC PPO ADP-Air"; + compatible = "qcom,sa6155p-adp-air", "qcom,sa6155p", "qcom,adp-air"; + qcom,msm-id = <377 0x0>, <380 0>; + qcom,board-id = <0x04010019 0>; +}; diff --git a/qcom/sa6155p-v2-adp-air-lpass.dts b/qcom/sa6155p-v2-adp-air-lpass.dts new file mode 100644 index 000000000000..a78afe32278c --- /dev/null +++ b/qcom/sa6155p-v2-adp-air-lpass.dts @@ -0,0 +1,12 @@ +/dts-v1/; + +#include "sa6155p.dtsi" +#include "sa6155-adp-air.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SA6155P v2 LPASS Audio PLL sourced + from eMAC PPO ADP-Air"; + compatible = "qcom,sa6155p-adp-air", "qcom,sa6155p", "qcom,adp-air"; + qcom,board-id = <0x04010019 0>; +}; + diff --git a/qcom/sa6155p-v2-adp-air-overlay.dts b/qcom/sa6155p-v2-adp-air-overlay.dts new file mode 100644 index 000000000000..c86c51cf35ae --- /dev/null +++ b/qcom/sa6155p-v2-adp-air-overlay.dts @@ -0,0 +1,11 @@ +/dts-v1/; +/plugin/; + +#include "sa6155-adp-air.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SA6155P ADP-AIR V2"; + compatible = "qcom,sa6155p-adp-air", "qcom,sa6155p", "qcom,adp-air"; + qcom,msm-id = <377 0x0>, <380 0>; + qcom,board-id = <0x03020019 0>; +}; diff --git a/qcom/sa6155p-v2-adp-air.dts b/qcom/sa6155p-v2-adp-air.dts new file mode 100644 index 000000000000..d2ef4583c69a --- /dev/null +++ b/qcom/sa6155p-v2-adp-air.dts @@ -0,0 +1,10 @@ +/dts-v1/; + +#include "sa6155p.dtsi" +#include "sa6155-adp-air.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SA6155P ADP-AIR V2"; + compatible = "qcom,sa6155p-adp-air", "qcom,sa6155p", "qcom,adp-air"; + qcom,board-id = <0x03020019 0>; +}; diff --git a/qcom/sa6155p-v2-adp-star-overlay.dts b/qcom/sa6155p-v2-adp-star-overlay.dts new file mode 100644 index 000000000000..238de97a680d --- /dev/null +++ b/qcom/sa6155p-v2-adp-star-overlay.dts @@ -0,0 +1,11 @@ +/dts-v1/; +/plugin/; + +#include "sa6155-adp-star.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SA6155P ADP-STAR V2"; + compatible = "qcom,sa6155p-adp-star", "qcom,sa6155p", "qcom,adp-star"; + qcom,msm-id = <377 0x0>, <380 0>; + qcom,board-id = <0x020019 0>; +}; diff --git a/qcom/sa6155p-v2-adp-star.dts b/qcom/sa6155p-v2-adp-star.dts new file mode 100644 index 000000000000..dffd3c18d374 --- /dev/null +++ b/qcom/sa6155p-v2-adp-star.dts @@ -0,0 +1,10 @@ +/dts-v1/; + +#include "sa6155p.dtsi" +#include "sa6155-adp-star.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SA6155P ADP-STAR V2"; + compatible = "qcom,sa6155p-adp-star", "qcom,sa6155p", "qcom,adp-star"; + qcom,board-id = <0x020019 0>; +}; diff --git a/qcom/sa6155p.dts b/qcom/sa6155p.dts new file mode 100644 index 000000000000..d689543fd75c --- /dev/null +++ b/qcom/sa6155p.dts @@ -0,0 +1,9 @@ +/dts-v1/; + +#include "sa6155p.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SA6155P SoC"; + compatible = "qcom,sa6155p"; + qcom,board-id = <0 0>; +}; diff --git a/qcom/sa6155p.dtsi b/qcom/sa6155p.dtsi new file mode 100644 index 000000000000..b77b5f81a3d5 --- /dev/null +++ b/qcom/sa6155p.dtsi @@ -0,0 +1,7 @@ +#include "sm6150.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SA6155P"; + qcom,msm-name = "SA6155P"; + qcom,msm-id = <377 0>, <380 0>; +}; diff --git a/qcom/sm6150-qupv3.dtsi b/qcom/sm6150-qupv3.dtsi new file mode 100644 index 000000000000..fba310e3e2eb --- /dev/null +++ b/qcom/sm6150-qupv3.dtsi @@ -0,0 +1,18 @@ + +&soc { + qupv3_0: qcom,qupv3_0_geni_se@8c0000 { + compatible = "qcom,geni-se-qup"; + reg = <0x008c0000 0x6000>; + ranges; + #address-cells = <2>; + #size-cells = <2>; + status = "disabled"; + + qupv3_se0_2uart: qcom,qup_uart@0x880000 { + compatible = "qcom,geni-debug-uart"; + reg = <0x0 0x00880000 0x0 0x4000>; + interrupts = ; + status = "ok"; + }; + }; +}; diff --git a/qcom/sm6150.dts b/qcom/sm6150.dts new file mode 100644 index 000000000000..77363a3a064e --- /dev/null +++ b/qcom/sm6150.dts @@ -0,0 +1,10 @@ +/dts-v1/; + +#include "sm6150.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SM6150 SoC"; + compatible = "qcom,sm6150"; + qcom,pmic-name = "PM6150"; + qcom,board-id = <0 0>; +}; diff --git a/qcom/sm6150.dtsi b/qcom/sm6150.dtsi new file mode 100644 index 000000000000..c205367f4f57 --- /dev/null +++ b/qcom/sm6150.dtsi @@ -0,0 +1,682 @@ +#include +#include +#include + +/ { + model = "Qualcomm Technologies, Inc. SM6150"; + compatible = "qcom,sm6150"; + qcom,msm-name = "SM6150"; + qcom,msm-id = <355 0x0>; + interrupt-parent = <&intc>; + + #address-cells = <2>; + #size-cells = <2>; + memory { device_type = "memory"; reg = <0 0 0 0>; }; + + aliases { + serial0 = &qupv3_se0_2uart; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + cache-size = <0x8000>; + next-level-cache = <&L2_0>; + #cooling-cells = <2>; + L2_0: l2-cache { + compatible = "arm,arch-cache"; + cache-size = <0x10000>; + cache-level = <2>; + next-level-cache = <&L3_0>; + + L3_0: l3-cache { + compatible = "arm,arch-cache"; + cache-size = <0x100000>; + cache-level = <3>; + }; + }; + + L1_I_0: l1-icache { + compatible = "arm,arch-cache"; + qcom,dump-size = <0x8800>; + }; + + L1_D_0: l1-dcache { + compatible = "arm,arch-cache"; + qcom,dump-size = <0x9000>; + }; + + L2_TLB_0: l2-tlb { + qcom,dump-size = <0x5000>; + }; + }; + + CPU1: cpu@100 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x100>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + cache-size = <0x8000>; + next-level-cache = <&L2_100>; + #cooling-cells = <2>; + L2_100: l2-cache { + compatible = "arm,arch-cache"; + cache-size = <0x10000>; + cache-level = <2>; + next-level-cache = <&L3_0>; + }; + + L1_I_100: l1-icache { + compatible = "arm,arch-cache"; + qcom,dump-size = <0x8800>; + }; + + L1_D_100: l1-dcache { + compatible = "arm,arch-cache"; + qcom,dump-size = <0x9000>; + }; + + L2_TLB_100: l1-tlb { + qcom,dump-size = <0x5000>; + }; + }; + + + CPU2: cpu@200 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x200>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + cache-size = <0x8000>; + next-level-cache = <&L2_200>; + #cooling-cells = <2>; + L2_200: l2-cache { + compatible = "arm,arch-cache"; + cache-size = <0x10000>; + cache-level = <2>; + next-level-cache = <&L3_0>; + }; + + L1_I_200: l1-icache { + compatible = "arm,arch-cache"; + qcom,dump-size = <0x8800>; + }; + + L1_D_200: l1-dcache { + compatible = "arm,arch-cache"; + qcom,dump-size = <0x9000>; + }; + + L2_TLB_200: l1-tlb { + qcom,dump-size = <0x5000>; + }; + }; + + CPU3: cpu@300 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x300>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + cache-size = <0x8000>; + next-level-cache = <&L2_300>; + #cooling-cells = <2>; + L2_300: l2-cache { + compatible = "arm,arch-cache"; + cache-size = <0x10000>; + cache-level = <2>; + next-level-cache = <&L3_0>; + }; + + L1_I_300: l1-icache { + compatible = "arm,arch-cache"; + qcom,dump-size = <0x8800>; + }; + + L1_D_300: l1-dcache { + compatible = "arm,arch-cache"; + qcom,dump-size = <0x9000>; + }; + + L2_TLB_300: l1-tlb { + qcom,dump-size = <0x5000>; + }; + }; + + CPU4: cpu@400 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x400>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + cache-size = <0x8000>; + next-level-cache = <&L2_400>; + #cooling-cells = <2>; + L2_400: l2-cache { + compatible = "arm,arch-cache"; + cache-size = <0x10000>; + cache-level = <2>; + next-level-cache = <&L3_0>; + }; + + L1_I_400: l1-icache { + compatible = "arm,arch-cache"; + qcom,dump-size = <0x8800>; + }; + + L1_D_400: l1-dcache { + compatible = "arm,arch-cache"; + qcom,dump-size = <0x9000>; + }; + + L2_TLB_400: l1-tlb { + qcom,dump-size = <0x5000>; + }; + }; + + CPU5: cpu@500 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x500>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + cache-size = <0x8000>; + next-level-cache = <&L2_500>; + #cooling-cells = <2>; + L2_500: l2-cache { + compatible = "arm,arch-cache"; + cache-size = <0x10000>; + cache-level = <2>; + next-level-cache = <&L3_0>; + }; + + L1_I_500: l1-icache { + compatible = "arm,arch-cache"; + qcom,dump-size = <0x8800>; + }; + + L1_D_500: l1-dcache { + compatible = "arm,arch-cache"; + qcom,dump-size = <0x9000>; + }; + + L2_TLB_500: l1-tlb { + qcom,dump-size = <0x5000>; + }; + }; + + CPU6: cpu@600 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x600>; + enable-method = "psci"; + capacity-dmips-mhz = <1740>; + cache-size = <0x10000>; + next-level-cache = <&L2_600>; + #cooling-cells = <2>; + L2_600: l2-cache { + compatible = "arm,arch-cache"; + cache-size = <0x40000>; + cache-level = <2>; + next-level-cache = <&L3_0>; + qcom,dump-size = <0x48000>; + }; + + L1_I_600: l1-icache { + compatible = "arm,arch-cache"; + qcom,dump-size = <0x11000>; + }; + + L1_D_600: l1-dcache { + compatible = "arm,arch-cache"; + qcom,dump-size = <0x12000>; + }; + + L1_ITLB_600: l1-itlb { + qcom,dump-size = <0x300>; + }; + + L1_DTLB_600: l1-dtlb { + qcom,dump-size = <0x480>; + }; + + L2_TLB_600: l2-tlb { + qcom,dump-size = <0x7800>; + }; + }; + + CPU7: cpu@700 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x700>; + enable-method = "psci"; + capacity-dmips-mhz = <1740>; + cache-size = <0x10000>; + next-level-cache = <&L2_700>; + #cooling-cells = <2>; + L2_700: l2-cache { + compatible = "arm,arch-cache"; + cache-size = <0x40000>; + cache-level = <2>; + next-level-cache = <&L3_0>; + qcom,dump-size = <0x48000>; + }; + + L1_I_700: l1-icache { + compatible = "arm,arch-cache"; + qcom,dump-size = <0x11000>; + }; + + L1_D_700: l1-dcache { + compatible = "arm,arch-cache"; + qcom,dump-size = <0x12000>; + }; + + L1_ITLB_700: l1-itlb { + qcom,dump-size = <0x300>; + }; + + L1_DTLB_700: l1-dtlb { + qcom,dump-size = <0x480>; + }; + + L2_TLB_700: l2-tlb { + qcom,dump-size = <0x7800>; + }; + }; + + cpu-map { + cluster0 { + core0 { + cpu = <&CPU0>; + }; + + core1 { + cpu = <&CPU1>; + }; + + core2 { + cpu = <&CPU2>; + }; + + core3 { + cpu = <&CPU3>; + }; + + core4 { + cpu = <&CPU4>; + }; + + core5 { + cpu = <&CPU5>; + }; + + }; + + cluster1 { + core0 { + cpu = <&CPU6>; + }; + + core1 { + cpu = <&CPU7>; + }; + }; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + chosen { + }; + + soc: soc { }; + + firmware: firmware { + }; + + reserved_memory: reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + hyp_region: hyp_region@85700000 { + no-map; + reg = <0x0 0x85700000 0x0 0x600000>; + }; + + xbl_aop_mem: xbl_aop_mem@85e00000 { + no-map; + reg = <0x0 0x85e00000 0x0 0x140000>; + }; + + sec_apps_mem: sec_apps_region@85fff000 { + no-map; + reg = <0x0 0x85fff000 0x0 0x1000>; + }; + + smem_region: smem@86000000 { + no-map; + reg = <0x0 0x86000000 0x0 0x200000>; + }; + + removed_region: removed_region@86200000 { + no-map; + reg = <0x0 0x86200000 0x0 0x2d00000>; + }; + + pil_camera_mem: camera_region@8ab00000 { + no-map; + reg = <0x0 0x8ab00000 0x0 0x500000>; + }; + + pil_modem_mem: modem_region@8b000000 { + no-map; + reg = <0x0 0x8b000000 0x0 0x8400000>; + }; + + pil_video_mem: pil_video_region@93400000 { + no-map; + reg = <0x0 0x93400000 0x0 0x500000>; + }; + + wlan_msa_mem: wlan_msa_region@93900000 { + no-map; + reg = <0x0 0x93900000 0x0 0x200000>; + }; + + pil_cdsp_mem: cdsp_regions@93b00000 { + no-map; + reg = <0x0 0x93b00000 0x0 0x1e00000>; + }; + + pil_adsp_mem: pil_adsp_region@95900000 { + no-map; + reg = <0x0 0x95900000 0x0 0x1e00000>; + }; + + pil_ipa_fw_mem: ips_fw_region@0x97700000 { + no-map; + reg = <0x0 0x97700000 0x0 0x10000>; + }; + + pil_ipa_gsi_mem: ipa_gsi_region@0x97710000 { + no-map; + reg = <0x0 0x97710000 0x0 0x5000>; + }; + + pil_gpu_mem: gpu_region@0x97715000 { + no-map; + reg = <0x0 0x97715000 0x0 0x2000>; + }; + + qseecom_mem: qseecom_region@0x9e400000 { + compatible = "shared-dma-pool"; + no-map; + reg = <0x0 0x9e400000 0x0 0x1400000>; + }; + + cdsp_sec_mem: cdsp_sec_regions@0x9f800000 { + no-map; + reg = <0x0 0x9f800000 0x0 0x1e00000>; + }; + + adsp_mem: adsp_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x800000>; + }; + + sdsp_mem: sdsp_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0 0x00000000 0 0xffffffff>; + reusable; + alignment = <0 0x400000>; + size = <0 0x400000>; + }; + + qseecom_ta_mem: qseecom_ta_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0 0x00000000 0 0xffffffff>; + reusable; + alignment = <0 0x400000>; + size = <0 0x1000000>; + }; + + sp_mem: sp_region { /* SPSS-HLOS ION shared mem */ + compatible = "shared-dma-pool"; + alloc-ranges = <0 0x00000000 0 0xffffffff>; /* 32-bit */ + reusable; + alignment = <0 0x400000>; + size = <0 0x800000>; + }; + + secure_display_memory: secure_display_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0 0x00000000 0 0xffffffff>; + reusable; + alignment = <0 0x400000>; + size = <0 0x8c00000>; + }; + + cont_splash_memory: cont_splash_region@9c000000 { + reg = <0x0 0x9c000000 0x0 0x0f00000>; + label = "cont_splash_region"; + }; + + dfps_data_memory: dfps_data_region@9cf00000 { + reg = <0x0 0x9cf00000 0x0 0x0100000>; + label = "dfps_data_region"; + }; + + disp_rdump_memory: disp_rdump_region@9c000000 { + reg = <0x0 0x9c000000 0x0 0x01000000>; + label = "disp_rdump_region"; + }; + + dump_mem: mem_dump_region { + compatible = "shared-dma-pool"; + reusable; + size = <0 0x2400000>; + }; + + /* global autoconfigured region for contiguous allocations */ + linux,cma { + compatible = "shared-dma-pool"; + alloc-ranges = <0 0x00000000 0 0xffffffff>; + reusable; + alignment = <0 0x400000>; + size = <0 0x2000000>; + linux,cma-default; + }; + }; +}; + +&soc { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0xffffffff>; + compatible = "simple-bus"; + + intc: interrupt-controller@17a00000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + interrupt-controller; + #redistributor-regions = <1>; + redistributor-stride = <0x0 0x20000>; + reg = <0x17a00000 0x10000>, /* GICD */ + <0x17a60000 0x100000>; /* GICR * 8 */ + interrupts = <1 9 4>; + interrupt-parent = <&intc>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 1 0xf08>, + <1 2 0xf08>, + <1 3 0xf08>, + <1 0 0xf08>; + clock-frequency = <19200000>; + }; + + timer@0x17c20000 { + #address-cells = <1>; + #size-cells = <1>; + ranges; + compatible = "arm,armv7-timer-mem"; + reg = <0x17c20000 0x1000>; + clock-frequency = <19200000>; + + frame@0x17c21000 { + frame-number = <0>; + interrupts = <0 8 0x4>, + <0 6 0x4>; + reg = <0x17c21000 0x1000>, + <0x17c22000 0x1000>; + }; + + frame@17c23000 { + frame-number = <1>; + interrupts = <0 9 0x4>; + reg = <0x17c23000 0x1000>; + status = "disabled"; + }; + + frame@17c25000 { + frame-number = <2>; + interrupts = <0 10 0x4>; + reg = <0x17c25000 0x1000>; + status = "disabled"; + }; + + frame@17c27000 { + frame-number = <3>; + interrupts = <0 11 0x4>; + reg = <0x17c27000 0x1000>; + status = "disabled"; + }; + + frame@17c29000 { + frame-number = <4>; + interrupts = <0 12 0x4>; + reg = <0x17c29000 0x1000>; + status = "disabled"; + }; + + frame@17c2b000 { + frame-number = <5>; + interrupts = <0 13 0x4>; + reg = <0x17c2b000 0x1000>; + status = "disabled"; + }; + + frame@17c2d000 { + frame-number = <6>; + interrupts = <0 14 0x4>; + reg = <0x17c2d000 0x1000>; + status = "disabled"; + }; + }; + + qcom,msm-imem@146aa000 { + compatible = "qcom,msm-imem"; + reg = <0x146aa000 0x1000>; + ranges = <0x0 0x146aa000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + mem_dump_table@10 { + compatible = "qcom,msm-imem-mem_dump_table"; + reg = <0x10 0x8>; + }; + + restart_reason@65c { + compatible = "qcom,msm-imem-restart_reason"; + reg = <0x65c 0x4>; + }; + + dload_type@1c { + compatible = "qcom,msm-imem-dload-type"; + reg = <0x1c 0x4>; + }; + + boot_stats@6b0 { + compatible = "qcom,msm-imem-boot_stats"; + reg = <0x6b0 0x20>; + }; + + kaslr_offset@6d0 { + compatible = "qcom,msm-imem-kaslr_offset"; + reg = <0x6d0 0xc>; + }; + + pil@94c { + compatible = "qcom,msm-imem-pil"; + reg = <0x94c 0xc8>; + }; + + diag_dload@c8 { + compatible = "qcom,msm-imem-diag-dload"; + reg = <0xc8 0xc8>; + }; + }; + + qcom,msm-rtb { + compatible = "qcom,msm-rtb"; + qcom,rtb-size = <0x100000>; + }; + + qcom,mpm2-sleep-counter@0xc221000 { + compatible = "qcom,mpm2-sleep-counter"; + reg = <0xc221000 0x1000>; + clock-frequency = <32768>; + }; + + apps_rsc: rsc@18200000 { + label = "apps_rsc"; + compatible = "qcom,rpmh-rsc"; + reg = <0x18200000 0x10000>, + <0x18210000 0x10000>, + <0x18220000 0x10000>; + reg-names = "drv-0", "drv-1", "drv-2"; + interrupts = , + , + ; + qcom,tcs-offset = <0xd00>; + qcom,drv-id = <2>; + qcom,tcs-config = , + , + , + ; + + apps_bcm_voter: bcm_voter { + compatible = "qcom,bcm-voter"; + }; + + rpmhcc: qcom,rpmhclk { + compatible = "qcom,sm6150-rpmh-clk"; + #clock-cells = <1>; + status = "okay"; + }; + + system_pm { + compatible = "qcom,system-pm"; + }; + }; +}; + +#include "sm6150-qupv3.dtsi" diff --git a/qcom/sm6150p.dts b/qcom/sm6150p.dts new file mode 100644 index 000000000000..b870d0579282 --- /dev/null +++ b/qcom/sm6150p.dts @@ -0,0 +1,10 @@ +/dts-v1/; + +#include "sm6150p.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SM6150P SoC"; + compatible = "qcom,sm6150p"; + qcom,pmic-name = "PM6150"; + qcom,board-id = <0 0>; +}; diff --git a/qcom/sm6150p.dtsi b/qcom/sm6150p.dtsi new file mode 100644 index 000000000000..9899d9049b16 --- /dev/null +++ b/qcom/sm6150p.dtsi @@ -0,0 +1,7 @@ +#include "sm6150.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SM6150P"; + qcom,msm-name = "SM6150P"; + qcom,msm-id = <369 0>; +};