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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-07 12:25:00 -04:00
clk: add/modify debugfs support for clocks
Update clock debugfs to support the below functionalities. - Allow enabling/disabling a clock. - Allow calling set_rate on a clock. - Display the list of enabled_clocks along with prepare_count, enable_count and rate. - Add a trace_clocks node to dump the current state of all clocks in the ftrace logs. Change-Id: Ib67b3a3409c9e7d8adb710bb524f54f543abf712 Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: David Dai <daidavid1@codeaurora.org> Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
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5 changed files with 289 additions and 3 deletions
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@ -23,6 +23,15 @@ config COMMON_CLK
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menu "Common Clock Framework"
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depends on COMMON_CLK
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config COMMON_CLK_QCOM_DEBUG
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bool "QCOM clock debug features"
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depends on DEBUG_FS && QGKI
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help
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Support for QCOM debug features. These features include
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modifications to existing debugfs nodes to make them writable (e.g.
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clk_enable_count, clk_rate), as well as new debugfs nodes (e.g.
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clk_enabled_list, debug_suspend, trace_clocks).
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config COMMON_CLK_WM831X
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tristate "Clock driver for WM831x/2x PMICs"
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depends on MFD_WM831X
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@ -3127,6 +3127,76 @@ static int clk_max_rate_show(struct seq_file *s, void *data)
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}
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DEFINE_SHOW_ATTRIBUTE(clk_max_rate);
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static int clock_debug_rate_set(void *data, u64 val)
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{
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struct clk_core *core = data;
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int ret;
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ret = clk_set_rate(core->hw->clk, val);
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if (ret)
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pr_err("clk_set_rate(%lu) failed (%d)\n",
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(unsigned long)val, ret);
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return ret;
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}
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static int clock_debug_rate_get(void *data, u64 *val)
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{
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struct clk_core *core = data;
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*val = clk_get_rate(core->hw->clk);
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return 0;
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}
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DEFINE_DEBUGFS_ATTRIBUTE(clock_rate_fops, clock_debug_rate_get,
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clock_debug_rate_set, "%llu\n");
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static ssize_t clock_parent_read(struct file *filp, char __user *ubuf,
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size_t cnt, loff_t *ppos)
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{
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char name[256] = {0};
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struct clk_core *core = filp->private_data;
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struct clk_core *p = core->hw->core->parent;
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snprintf(name, sizeof(name), "%s\n", p ? p->name : "None\n");
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return simple_read_from_buffer(ubuf, cnt, ppos, name, strlen(name));
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}
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static const struct file_operations clock_parent_fops = {
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.open = simple_open,
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.read = clock_parent_read,
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};
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static int clock_debug_enable_set(void *data, u64 val)
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{
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struct clk_core *core = data;
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int rc = 0;
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if (val)
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rc = clk_prepare_enable(core->hw->clk);
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else
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clk_disable_unprepare(core->hw->clk);
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return rc;
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}
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static int clock_debug_enable_get(void *data, u64 *val)
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{
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struct clk_core *core = data;
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int enabled = 0;
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enabled = core->enable_count;
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*val = enabled;
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return 0;
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}
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DEFINE_DEBUGFS_ATTRIBUTE(clock_enable_fops, clock_debug_enable_get,
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clock_debug_enable_set, "%lld\n");
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static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
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{
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struct dentry *root;
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@ -3137,14 +3207,15 @@ static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
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root = debugfs_create_dir(core->name, pdentry);
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core->dentry = root;
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debugfs_create_ulong("clk_rate", 0444, root, &core->rate);
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debugfs_create_file("clk_rate", 0444, root, core, &clock_rate_fops);
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debugfs_create_file("clk_min_rate", 0444, root, core, &clk_min_rate_fops);
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debugfs_create_file("clk_max_rate", 0444, root, core, &clk_max_rate_fops);
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debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy);
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debugfs_create_u32("clk_phase", 0444, root, &core->phase);
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debugfs_create_file("clk_flags", 0444, root, core, &clk_flags_fops);
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debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count);
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debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count);
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debugfs_create_file("clk_enable_count", 0444, root, core,
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&clock_enable_fops);
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debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count);
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debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count);
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debugfs_create_file("clk_duty_cycle", 0444, root, core,
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@ -3196,6 +3267,156 @@ static void clk_debug_unregister(struct clk_core *core)
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mutex_unlock(&clk_debug_lock);
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}
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#ifdef CONFIG_COMMON_CLK_QCOM_DEBUG
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#define clock_debug_output(m, fmt, ...) \
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do { \
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if (m) \
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seq_printf(m, fmt, ##__VA_ARGS__); \
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else \
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pr_info(fmt, ##__VA_ARGS__); \
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} while (0)
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static int clock_debug_print_clock(struct clk_core *c, struct seq_file *s)
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{
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char *start = "\t";
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struct clk *clk;
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if (!c || !c->prepare_count)
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return 0;
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clk = c->hw->clk;
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do {
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c = clk->core;
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if (c->ops->list_rate_vdd_level)
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clock_debug_output(s, "%s%s:%u:%u [%ld, %d]", start,
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c->name,
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c->prepare_count,
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c->enable_count,
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c->rate,
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c->ops->list_rate_vdd_level(c->hw, c->rate));
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else
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clock_debug_output(s, "%s%s:%u:%u [%ld]", start,
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c->name,
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c->prepare_count,
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c->enable_count,
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c->rate);
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start = " -> ";
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} while (s && (clk = clk_get_parent(clk)));
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if (s)
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clock_debug_output(s, "\n");
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return 1;
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}
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/*
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* clock_debug_print_enabled_clocks() - Print names of enabled clocks
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*/
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static void clock_debug_print_enabled_clocks(struct seq_file *s)
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{
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struct clk_core *core;
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int cnt = 0;
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clock_debug_output(s, "Enabled clocks:\n");
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hlist_for_each_entry(core, &clk_debug_list, debug_node)
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cnt += clock_debug_print_clock(core, s);
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if (cnt)
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clock_debug_output(s, "Enabled clock count: %d\n", cnt);
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else
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clock_debug_output(s, "No clocks enabled.\n");
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}
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static int enabled_clocks_show(struct seq_file *s, void *unused)
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{
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mutex_lock(&clk_debug_lock);
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clock_debug_print_enabled_clocks(s);
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mutex_unlock(&clk_debug_lock);
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return 0;
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}
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static int enabled_clocks_open(struct inode *inode, struct file *file)
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{
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return single_open(file, enabled_clocks_show, inode->i_private);
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}
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static const struct file_operations clk_enabled_list_fops = {
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.open = enabled_clocks_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = seq_release,
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};
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static u32 debug_suspend;
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/*
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* Print the names of all enabled clocks and their parents if
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* debug_suspend is set from debugfs.
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*/
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void clock_debug_print_enabled(void)
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{
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if (likely(!debug_suspend))
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return;
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if (!mutex_trylock(&clk_debug_lock))
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return;
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clock_debug_print_enabled_clocks(NULL);
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mutex_unlock(&clk_debug_lock);
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}
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EXPORT_SYMBOL(clock_debug_print_enabled);
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static void clk_state_subtree(struct clk_core *c)
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{
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int vdd_level = 0;
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struct clk_core *child;
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if (!c)
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return;
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if (c->ops->list_rate_vdd_level)
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vdd_level = c->ops->list_rate_vdd_level(c->hw, c->rate);
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trace_clk_state(c->name, c->prepare_count, c->enable_count,
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c->rate, vdd_level);
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hlist_for_each_entry(child, &c->children, child_node)
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clk_state_subtree(child);
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}
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static int clk_state_show(struct seq_file *s, void *data)
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{
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struct clk_core *c;
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struct hlist_head **lists = (struct hlist_head **)s->private;
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clk_prepare_lock();
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for (; *lists; lists++)
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hlist_for_each_entry(c, *lists, child_node)
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clk_state_subtree(c);
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clk_prepare_unlock();
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return 0;
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}
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static int clk_state_open(struct inode *inode, struct file *file)
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{
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return single_open(file, clk_state_show, inode->i_private);
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}
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static const struct file_operations clk_state_fops = {
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.open = clk_state_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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};
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#endif
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/**
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* clk_debug_init - lazily populate the debugfs clk directory
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*
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@ -3220,6 +3441,14 @@ static int __init clk_debug_init(void)
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debugfs_create_file("clk_orphan_dump", 0444, rootdir, &orphan_list,
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&clk_dump_fops);
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#ifdef CONFIG_COMMON_CLK_QCOM_DEBUG
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debugfs_create_file("clk_enabled_list", 0444, rootdir,
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&clk_debug_list, &clk_enabled_list_fops);
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debugfs_create_u32("debug_suspend", 0644, rootdir, &debug_suspend);
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debugfs_create_file("trace_clocks", 0444, rootdir, &all_lists,
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&clk_state_fops);
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#endif
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mutex_lock(&clk_debug_lock);
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hlist_for_each_entry(core, &clk_debug_list, debug_node)
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clk_debug_create_one(core, rootdir);
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@ -25,6 +25,10 @@ struct clk_hw *clk_find_hw(const char *dev_id, const char *con_id);
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struct clk *clk_hw_create_clk(struct device *dev, struct clk_hw *hw,
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const char *dev_id, const char *con_id);
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void __clk_put(struct clk *clk);
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/* Debugfs API to print the enabled clocks */
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void clock_debug_print_enabled(void);
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#else
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/* All these casts to avoid ifdefs in clkdev... */
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static inline struct clk *
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@ -208,6 +208,10 @@ struct clk_duty {
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* requirements that were needed while the clock and its tree
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* was changing states. Returns 0 on success, -EERROR otherwise.
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*
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* @list_rate_vdd_level: Queries the required voltage level for the given rate.
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* The return value may not represent an exact voltage and instead
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* may be an abstract index or voltage "corner".
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*
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* The clk_enable/clk_disable and clk_prepare/clk_unprepare pairs allow
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* implementations to split any work between atomic (enable) and sleepable
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* (prepare) contexts. If enabling a clock requires code that might sleep,
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@ -259,6 +263,10 @@ struct clk_ops {
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int (*post_rate_change)(struct clk_hw *hw,
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unsigned long old_rate,
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unsigned long rate);
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#ifdef CONFIG_COMMON_CLK_QCOM_DEBUG
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int (*list_rate_vdd_level)(struct clk_hw *hw,
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unsigned int rate);
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#endif
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};
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/**
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@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
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* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
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*/
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#undef TRACE_SYSTEM
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#define TRACE_SYSTEM clk
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@ -220,6 +220,42 @@ DEFINE_EVENT(clk_duty_cycle, clk_set_duty_cycle_complete,
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TP_ARGS(core, duty)
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);
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DECLARE_EVENT_CLASS(clk_state_dump,
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TP_PROTO(const char *name, unsigned int prepare_count,
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unsigned int enable_count, unsigned long rate, unsigned int vdd_level),
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TP_ARGS(name, prepare_count, enable_count, rate, vdd_level),
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TP_STRUCT__entry(
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__string(name, name)
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__field(unsigned int, prepare_count)
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__field(unsigned int, enable_count)
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__field(unsigned long, rate)
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__field(unsigned int, vdd_level)
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),
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TP_fast_assign(
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__assign_str(name, name);
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__entry->prepare_count = prepare_count;
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__entry->enable_count = enable_count;
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__entry->rate = rate;
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__entry->vdd_level = vdd_level;
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),
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TP_printk("%s\tprepare:enable cnt [%u:%u]\trate: vdd_level [%lu:%u]",
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__get_str(name), __entry->prepare_count, __entry->enable_count,
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__entry->rate, __entry->vdd_level)
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);
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DEFINE_EVENT(clk_state_dump, clk_state,
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TP_PROTO(const char *name, unsigned int prepare_count,
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unsigned int enable_count, unsigned long rate, unsigned int vdd_level),
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TP_ARGS(name, prepare_count, enable_count, rate, vdd_level)
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);
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#endif /* _TRACE_CLK_H */
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/* This part must be outside protection */
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