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ARM: dts: msm: Add acd registers for HOLI

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The GPU GX GDSC requires the ACD block/misc resets during GDSC
power-up/down sequence, thus add the register offsets.

Change-Id: Ica77fa0a270186ecdbafb4e8d0888ef0b81613bf
This commit is contained in:
Taniya Das 2020-10-30 15:32:48 +05:30
commit fd6d17fd4a
1 changed files with 12 additions and 0 deletions
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12
qcom/holi-gdsc.dtsi
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@ -97,6 +97,16 @@
reg = <0x5991008 0x4>;
};
gpu_gx_acd_reset: syscon@5991160 {
compatible = "syscon";
reg = <0x5991160 0x4>;
};
gpu_gx_acd_misc_reset: syscon@5998004 {
compatible = "syscon";
reg = <0x5998004 0x4>;
};
gpu_cx_gdsc: qcom,gdsc@599106c {
compatible = "qcom,gdsc";
reg = <0x599106c 0x4>;
@ -113,6 +123,8 @@
reg = <0x599100c 0x4>;
regulator-name = "gpu_gx_gdsc";
sw-reset = <&gpu_gx_sw_reset>;
acd-reset = <&gpu_gx_acd_reset>;
acd-misc-reset = <&gpu_gx_acd_misc_reset>;
domain-addr = <&gpu_gx_domain_addr>;
qcom,reset-aon-logic;
status = "disabled";