From fdc63188f4c549753b5942c9a4e9d05b9e59d23e Mon Sep 17 00:00:00 2001 From: Steve Cohen Date: Thu, 28 Mar 2019 17:00:29 -0400 Subject: [PATCH] disp: msm: sde: add Lahaina version checks Add version checks for Lahaina (MDSS v7.0.0) and enable all kona features. Change-Id: I79acaf8310a437fff3d203656b856b44cdfdfb48 Signed-off-by: Steve Cohen --- msm/sde/sde_hw_catalog.c | 32 ++++++++++++++++++++++++++++++++ msm/sde/sde_hw_catalog.h | 2 ++ 2 files changed, 34 insertions(+) diff --git a/msm/sde/sde_hw_catalog.c b/msm/sde/sde_hw_catalog.c index 472de9d211a1..599fc27e0029 100644 --- a/msm/sde/sde_hw_catalog.c +++ b/msm/sde/sde_hw_catalog.c @@ -4272,6 +4272,38 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) sde_cfg->has_sui_blendstage = true; sde_cfg->has_intf_te = true; sde_cfg->vbif_disable_inner_outer_shareable = true; + } else if (IS_LAHAINA_TARGET(hw_rev)) { + sde_cfg->has_cwb_support = true; + sde_cfg->has_wb_ubwc = true; + sde_cfg->has_qsync = true; + sde_cfg->perf.min_prefill_lines = 24; + sde_cfg->vbif_qos_nlvl = 8; + sde_cfg->ts_prefill_rev = 2; + sde_cfg->ctl_rev = SDE_CTL_CFG_VERSION_1_0_0; + sde_cfg->delay_prg_fetch_start = true; + sde_cfg->sui_ns_allowed = true; + sde_cfg->sui_misr_supported = true; + sde_cfg->sui_block_xin_mask = 0x3F71; + sde_cfg->has_3d_merge_reset = true; + clear_bit(MDSS_INTR_AD4_0_INTR, sde_cfg->mdss_irqs); + clear_bit(MDSS_INTR_AD4_1_INTR, sde_cfg->mdss_irqs); + sde_cfg->has_hdr = true; + sde_cfg->has_hdr_plus = true; + set_bit(SDE_MDP_DHDR_MEMPOOL, &sde_cfg->mdp[0].features); + sde_cfg->has_vig_p010 = true; + sde_cfg->true_inline_rot_rev = SDE_INLINE_ROT_VERSION_1_0_0; + sde_cfg->true_inline_dwnscale_rt_num = + MAX_DOWNSCALE_RATIO_INLINE_ROT_RT_NUMERATOR; + sde_cfg->true_inline_dwnscale_rt_denom = + MAX_DOWNSCALE_RATIO_INLINE_ROT_RT_DENOMINATOR; + sde_cfg->true_inline_dwnscale_nrt = + MAX_DOWNSCALE_RATIO_INLINE_ROT_NRT_DEFAULT; + sde_cfg->true_inline_prefill_fudge_lines = 2; + sde_cfg->true_inline_prefill_lines_nv12 = 32; + sde_cfg->true_inline_prefill_lines = 48; + sde_cfg->uidle_cfg.uidle_rev = SDE_UIDLE_VERSION_1_0_0; + sde_cfg->has_intf_te = true; + sde_cfg->vbif_disable_inner_outer_shareable = true; } else { SDE_ERROR("unsupported chipset id:%X\n", hw_rev); sde_cfg->perf.min_prefill_lines = 0xffff; diff --git a/msm/sde/sde_hw_catalog.h b/msm/sde/sde_hw_catalog.h index 1ecb3e711e78..9f12b90f5f24 100644 --- a/msm/sde/sde_hw_catalog.h +++ b/msm/sde/sde_hw_catalog.h @@ -43,6 +43,7 @@ #define SDE_HW_VER_600 SDE_HW_VER(6, 0, 0) /* kona */ #define SDE_HW_VER_610 SDE_HW_VER(6, 1, 0) /* sm7250 */ #define SDE_HW_VER_630 SDE_HW_VER(6, 3, 0) /* bengal */ +#define SDE_HW_VER_700 SDE_HW_VER(7, 0, 0) /* lahaina */ /* Avoid using below IS_XXX macros outside catalog, use feature bit instead */ #define IS_SDE_MAJOR_SAME(rev1, rev2) \ @@ -62,6 +63,7 @@ #define IS_KONA_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_600) #define IS_SAIPAN_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_610) #define IS_BENGAL_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_630) +#define IS_LAHAINA_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_700) #define SDE_HW_BLK_NAME_LEN 16