From 3189becc0eb7fcaa4d48243da50c77f26ea51c34 Mon Sep 17 00:00:00 2001 From: Ram Chandrasekar Date: Fri, 18 Sep 2020 11:03:04 -0700 Subject: [PATCH 1/4] dt-bindings: Add CPU hotplug cooling device Add CPU hotplug cooling device, which will hotplug a CPU to achieve thermal cooling. Change-Id: I7bbc46f16c35a4b6c31b14067b5ba9a2279296ab --- bindings/thermal/qti-cpu-hotplug-cdev.txt | 50 +++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 bindings/thermal/qti-cpu-hotplug-cdev.txt diff --git a/bindings/thermal/qti-cpu-hotplug-cdev.txt b/bindings/thermal/qti-cpu-hotplug-cdev.txt new file mode 100644 index 000000000000..8e85097a657d --- /dev/null +++ b/bindings/thermal/qti-cpu-hotplug-cdev.txt @@ -0,0 +1,50 @@ +QTI CPU hotplug cooling devices. + +The CPU hotplug cooling device will be used for hotpluging a CPU on a thermal +condition. This cooling device driver can register one cooling device per CPU, +which can be used by thermal zone to mitigate. + +Each child node will represent a cooling device and the child node should +point to the CPU, which will be mitigated by that cooling device instance. + +Properties: +- compatible: + Usage: required + Value type: + Definition: should be "qcom,cpu-hotplug" + +Cooling device node: +- qcom,cpu: + Usage: required + Value type: + Definition: phandle to the CPU device that this cooling device will + mitigate. + +-#cooling-cells: + Usage: required + Value type: + Definition: Must be 2. Needed for of_thermal as cooling device + identifier. Please refer to + for more + details. +Example: + qcom,cpu-hotplug { + compatible = "qcom,cpu-hotplug"; + + cpu0_hotplug: cpu0-hotplug { + qcom,cpu = <&CPU0>; + #cooling-cells = <2>; + }; + cpu1_hotplug: cpu1-hotplug { + qcom,cpu = <&CPU1>; + #cooling-cells = <2>; + }; + cpu2_hotplug: cpu2-hotplug { + qcom,cpu = <&CPU2>; + #cooling-cells = <2>; + }; + cpu3_hotplug: cpu3-hotplug { + qcom,cpu = <&CPU3>; + #cooling-cells = <2>; + }; + }; From 242ad91d0eaac6b43aae3bd67a2e2e1b021bf69a Mon Sep 17 00:00:00 2001 From: Ram Chandrasekar Date: Fri, 18 Sep 2020 11:09:28 -0700 Subject: [PATCH 2/4] ARM: dts: msm: Add CPU hotplug cooling device for lahaina Add CPU hotplug cooling device for lahaina to achieve thermal cooling. Change-Id: I7e935d75d557b22d3e8163b380bb480c469f1ea2 --- qcom/lahaina-thermal.dtsi | 43 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/qcom/lahaina-thermal.dtsi b/qcom/lahaina-thermal.dtsi index 58f5763c1df1..fc7bcc9c488b 100644 --- a/qcom/lahaina-thermal.dtsi +++ b/qcom/lahaina-thermal.dtsi @@ -100,6 +100,49 @@ }; }; + qcom,cpu-hotplug { + compatible = "qcom,cpu-hotplug"; + cpu0_hotplug: cpu0-hotplug { + qcom,cpu = <&CPU0>; + #cooling-cells = <2>; + }; + + cpu1_hotplug: cpu1-hotplug { + qcom,cpu = <&CPU1>; + #cooling-cells = <2>; + }; + + cpu2_hotplug: cpu2-hotplug { + qcom,cpu = <&CPU2>; + #cooling-cells = <2>; + }; + + cpu3_hotplug: cpu3-hotplug { + qcom,cpu = <&CPU3>; + #cooling-cells = <2>; + }; + + cpu4_hotplug: cpu4-hotplug { + qcom,cpu = <&CPU4>; + #cooling-cells = <2>; + }; + + cpu5_hotplug: cpu5-hotplug { + qcom,cpu = <&CPU5>; + #cooling-cells = <2>; + }; + + cpu6_hotplug: cpu6-hotplug { + qcom,cpu = <&CPU6>; + #cooling-cells = <2>; + }; + + cpu7_hotplug: cpu7-hotplug { + qcom,cpu = <&CPU7>; + #cooling-cells = <2>; + }; + }; + qcom,limits-dcvs { compatible = "qcom,msm-hw-limits"; isens_vref_0p8-supply = <&pm8350_l5_ao>; From 8049bbbca0f74421d06be9fd9b2b3e1c554d8464 Mon Sep 17 00:00:00 2001 From: Ram Chandrasekar Date: Mon, 14 Sep 2020 12:22:27 -0700 Subject: [PATCH 3/4] ARM: dts: msm: Add second trip threshold for skin sensor in lahaina Add second trip threshold for skin sensor, to be used by thermal HAL in lahaina. Change-Id: I7d68412c8e55d1267a00b219c779138a90a4be5e --- qcom/lahaina-pmic-overlay.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/qcom/lahaina-pmic-overlay.dtsi b/qcom/lahaina-pmic-overlay.dtsi index e08b0bea9cc9..052c892cc915 100644 --- a/qcom/lahaina-pmic-overlay.dtsi +++ b/qcom/lahaina-pmic-overlay.dtsi @@ -494,6 +494,12 @@ hysteresis = <1000>; type = "passive"; }; + + active-config1 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; }; }; From d92e38bfdf13e55beeccae13f56e13978cbc7a7a Mon Sep 17 00:00:00 2001 From: Ram Chandrasekar Date: Wed, 16 Sep 2020 14:38:09 -0700 Subject: [PATCH 4/4] ARM: dts: msm: free up SDPM 4 in lahaina SDPM 4 is right now used for tracking CPU. Free up this SDPM so that it can be used for HVX in lahaina. Change-Id: I3c25f7e57c1bd947c5ef0a461cb0eb9eed4f847c --- qcom/lahaina-thermal.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/qcom/lahaina-thermal.dtsi b/qcom/lahaina-thermal.dtsi index fc7bcc9c488b..3ed3d6eaac4b 100644 --- a/qcom/lahaina-thermal.dtsi +++ b/qcom/lahaina-thermal.dtsi @@ -37,8 +37,7 @@ clocks = <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, <&clock_gcc GCC_UFS_PHY_AXI_CLK_SRC>; cam_cc_csi0phytiimer-supply = <&cam_cc_ipe_0_gdsc>; - cpu = <&CPU7>; - csr-id = <5 7 4>; + csr-id = <5 7>; }; mx_pe: mx_rdpm_pe@0x00637000 {