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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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ARM: SoC driver updates for 4.16
A number of new drivers get added this time, along with many low-priority
bugfixes. The most interesting changes by subsystem are:
bus drivers:
- Updates to the Broadcom bus interface driver to support newer SoC types
- The TI OMAP sysc driver now supports updated DT bindings
memory controllers:
- A new driver for Tegra186 gets added
- A new driver for the ti-emif sram, to allow relocating
suspend/resume handlers there
SoC specific:
- A new driver for Qualcomm QMI, the interface to the modem on MSM SoCs
- A new driver for power domains on the actions S700 SoC
- A driver for the Xilinx Zynq VCU logicoreIP
reset controllers:
- A new driver for Amlogic Meson-AGX
- various bug fixes
tee subsystem:
- A new user interface got added to enable asynchronous communication
with the TEE supplicant.
- A new method of using user space memory for communication with
the TEE is added
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"A number of new drivers get added this time, along with many
low-priority bugfixes. The most interesting changes by subsystem are:
bus drivers:
- Updates to the Broadcom bus interface driver to support newer SoC
types
- The TI OMAP sysc driver now supports updated DT bindings
memory controllers:
- A new driver for Tegra186 gets added
- A new driver for the ti-emif sram, to allow relocating
suspend/resume handlers there
SoC specific:
- A new driver for Qualcomm QMI, the interface to the modem on MSM
SoCs
- A new driver for power domains on the actions S700 SoC
- A driver for the Xilinx Zynq VCU logicoreIP
reset controllers:
- A new driver for Amlogic Meson-AGX
- various bug fixes
tee subsystem:
- A new user interface got added to enable asynchronous communication
with the TEE supplicant.
- A new method of using user space memory for communication with the
TEE is added"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (84 commits)
of: platform: fix OF node refcount leak
soc: fsl: guts: Add a NULL check for devm_kasprintf()
bus: ti-sysc: Fix smartreflex sysc mask
psci: add CPU_IDLE dependency
soc: xilinx: Fix Kconfig alignment
soc: xilinx: xlnx_vcu: Use bitwise & rather than logical && on clkoutdiv
soc: xilinx: xlnx_vcu: Depends on HAS_IOMEM for xlnx_vcu
soc: bcm: brcmstb: Be multi-platform compatible
soc: brcmstb: biuctrl: exit without warning on non brcmstb platforms
Revert "soc: brcmstb: Only register SoC device on STB platforms"
bus: omap: add MODULE_LICENSE tags
soc: brcmstb: Only register SoC device on STB platforms
tee: shm: Potential NULL dereference calling tee_shm_register()
soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver
dt-bindings: soc: xilinx: Add DT bindings to xlnx_vcu driver
soc: xilinx: Create folder structure for soc specific drivers
of: platform: populate /firmware/ node from of_platform_default_populate_init()
soc: samsung: Add SPDX license identifiers
soc: qcom: smp2p: Use common error handling code in qcom_smp2p_probe()
tee: shm: don't put_page on null shm->pages
...
This commit is contained in:
Linus Torvalds
commit
fe53d1443a
93 changed files with 6909 additions and 735 deletions
124
include/dt-bindings/reset/amlogic,meson-axg-reset.h
Normal file
124
include/dt-bindings/reset/amlogic,meson-axg-reset.h
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@ -0,0 +1,124 @@
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/*
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*
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* Copyright (c) 2016 BayLibre, SAS.
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*
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* Copyright (c) 2017 Amlogic, inc.
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* Author: Yixun Lan <yixun.lan@amlogic.com>
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*
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* SPDX-License-Identifier: (GPL-2.0+ OR BSD)
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*/
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#ifndef _DT_BINDINGS_AMLOGIC_MESON_AXG_RESET_H
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#define _DT_BINDINGS_AMLOGIC_MESON_AXG_RESET_H
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/* RESET0 */
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#define RESET_HIU 0
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#define RESET_PCIE_A 1
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#define RESET_PCIE_B 2
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#define RESET_DDR_TOP 3
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/* 4 */
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#define RESET_VIU 5
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#define RESET_PCIE_PHY 6
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#define RESET_PCIE_APB 7
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/* 8 */
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/* 9 */
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#define RESET_VENC 10
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#define RESET_ASSIST 11
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/* 12 */
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#define RESET_VCBUS 13
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/* 14 */
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/* 15 */
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#define RESET_GIC 16
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#define RESET_CAPB3_DECODE 17
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/* 18-21 */
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#define RESET_SYS_CPU_CAPB3 22
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#define RESET_CBUS_CAPB3 23
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#define RESET_AHB_CNTL 24
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#define RESET_AHB_DATA 25
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#define RESET_VCBUS_CLK81 26
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#define RESET_MMC 27
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/* 28-31 */
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/* RESET1 */
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/* 32 */
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/* 33 */
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#define RESET_USB_OTG 34
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#define RESET_DDR 35
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#define RESET_AO_RESET 36
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/* 37 */
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#define RESET_AHB_SRAM 38
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/* 39 */
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/* 40 */
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#define RESET_DMA 41
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#define RESET_ISA 42
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#define RESET_ETHERNET 43
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/* 44 */
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#define RESET_SD_EMMC_B 45
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#define RESET_SD_EMMC_C 46
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#define RESET_ROM_BOOT 47
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#define RESET_SYS_CPU_0 48
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#define RESET_SYS_CPU_1 49
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#define RESET_SYS_CPU_2 50
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#define RESET_SYS_CPU_3 51
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#define RESET_SYS_CPU_CORE_0 52
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#define RESET_SYS_CPU_CORE_1 53
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#define RESET_SYS_CPU_CORE_2 54
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#define RESET_SYS_CPU_CORE_3 55
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#define RESET_SYS_PLL_DIV 56
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#define RESET_SYS_CPU_AXI 57
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#define RESET_SYS_CPU_L2 58
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#define RESET_SYS_CPU_P 59
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#define RESET_SYS_CPU_MBIST 60
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/* 61-63 */
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/* RESET2 */
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/* 64 */
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/* 65 */
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#define RESET_AUDIO 66
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/* 67 */
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#define RESET_MIPI_HOST 68
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#define RESET_AUDIO_LOCKER 69
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#define RESET_GE2D 70
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/* 71-76 */
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#define RESET_AO_CPU_RESET 77
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/* 78-95 */
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/* RESET3 */
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#define RESET_RING_OSCILLATOR 96
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/* 97-127 */
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/* RESET4 */
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/* 128 */
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/* 129 */
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#define RESET_MIPI_PHY 130
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/* 131-140 */
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#define RESET_VENCL 141
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#define RESET_I2C_MASTER_2 142
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#define RESET_I2C_MASTER_1 143
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/* 144-159 */
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/* RESET5 */
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/* 160-191 */
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/* RESET6 */
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#define RESET_PERIPHS_GENERAL 192
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#define RESET_PERIPHS_SPICC 193
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/* 194 */
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/* 195 */
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#define RESET_PERIPHS_I2C_MASTER_0 196
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/* 197-200 */
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#define RESET_PERIPHS_UART_0 201
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#define RESET_PERIPHS_UART_1 202
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/* 203-204 */
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#define RESET_PERIPHS_SPI_0 205
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#define RESET_PERIPHS_I2C_MASTER_3 206
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/* 207-223 */
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/* RESET7 */
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#define RESET_USB_DDR_0 224
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#define RESET_USB_DDR_1 225
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#define RESET_USB_DDR_2 226
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#define RESET_USB_DDR_3 227
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/* 228 */
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#define RESET_DEVICE_MMC_ARB 229
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/* 230 */
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#define RESET_VID_LOCK 231
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#define RESET_A9_DMC_PIPEL 232
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#define RESET_DMC_VPU_PIPEL 233
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/* 234-255 */
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#endif
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