From ff0f02fa29f1c21bba020c2d36882049d97610a8 Mon Sep 17 00:00:00 2001 From: Jack Pham Date: Thu, 21 May 2020 21:51:35 -0700 Subject: [PATCH] ARM: dts: qcom: Update USB settings for L1 LPM on Lahaina The USB controller supports link power management (L1 LPM) for high speed. Remove the "snps,dis_enblslpm_quirk" property which disables that feature. While there, clean up the "snps,hird-threshold" value as that is only supposed to be 4-bits; the 5th bit is set by a separate property "snps,is-utmi-l1-suspend". These will allow for maximum power savings when connected in USB 2.0 mode and L1 LPM is supported for both host and peripheral modes. Finally, remove the unused "usb-core-id" properties. Change-Id: Ib9dc3a9c27d9a0f56dd0c75c8b7389ac44c9a7cb --- qcom/lahaina-usb.dtsi | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/qcom/lahaina-usb.dtsi b/qcom/lahaina-usb.dtsi index 964b11edbd18..6b1678dc2e2e 100644 --- a/qcom/lahaina-usb.dtsi +++ b/qcom/lahaina-usb.dtsi @@ -66,13 +66,12 @@ linux,sysdev_is_parent; snps,disable-clk-gating; snps,has-lpm-erratum; - snps,hird-threshold = /bits/ 8 <0x10>; + snps,hird-threshold = /bits/ 8 <0x0>; + snps,is-utmi-l1-suspend; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; snps,dis_u2_susphy_quirk; - snps,dis_enblslpm_quirk; snps,ssp-u3-u0-quirk; - usb-core-id = <0>; tx-fifo-resize; maximum-speed = "super-speed-plus"; dr_mode = "otg"; @@ -395,12 +394,11 @@ linux,sysdev_is_parent; snps,disable-clk-gating; snps,has-lpm-erratum; - snps,hird-threshold = /bits/ 8 <0x10>; + snps,hird-threshold = /bits/ 8 <0x0>; + snps,is-utmi-l1-suspend; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; snps,dis_u2_susphy_quirk; - snps,dis_enblslpm_quirk; - usb-core-id = <1>; tx-fifo-resize; maximum-speed = "super-speed"; dr_mode = "otg";