This patch adds the different touchscreens that can be connected using
the displays available for this board.
http://boundarydevices.com/product-category/displays/
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds support for the 7" LCD display available for Sabrelite:
http://boundarydevices.com/product/7-800x480-display/
Also add label to backlight_lcd and connect it to the panel.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds support for the 7" LCD display available for Nitrogen6x:
http://boundarydevices.com/product/7-800x480-display/
Also add label to backlight_lcd and connect it to the panel.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add device tree node for touchscreen support on Colibri VF50. The
touchscreen functionality on VF50 uses the ADC channels of Vybrid
and some GPIOs. Also add pinctrl nodes for proper pinmux.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change corrects cpu compatible property to a defined one,
see Documentation/devicetree/bindings/arm/cpus.txt
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The change corrects cpu compatible property to a defined one,
see Documentation/devicetree/bindings/arm/cpus.txt
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add device tree node to support iomuxc-lpsr controller, fsl,input-sel
phandle allows to get input select register base address which is
shared from main iomuxc controller.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The INA220 monitors both shunt drop and supply voltage.
Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds dma-coherent property for eTSEC nodes, so
coherent DMA operations are supported.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for USBOTG1 and USBOTG2.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add imx6ul touchscreen controller support.
TSC module need ADC2 module to measure the touchscreen
coordinate value. This patch put TSC and ADC2 together,
make ADC2 module only be used for TSC, can't be used as
a normal ADC.
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The DCP block present on MX6SL is compatible with the one on MX28,
so add the compatible string and also complete the interrupt entries.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Starting with commit 8947e396a8 ("Documentation: dt: mtd: replace
"nor-jedec" binding with "jedec, spi-nor"") we have "jedec,spi-nor"
binding indicating support for JEDEC identification.
Use it for all flashes that are supposed to support READ ID op according
to the datasheets.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch enables On Chip OTP support for i.MX23 and i.MX28 SoCs,
but keeps the old compatible string.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx7d-sdb board has a eMMC5.0 on usdhc3. This eMMC support HS400.
This patch add usdhc3 support for HS400
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
Acked-by: Dong Aisheng <aisheng.dong@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX6UL can be powered off by programming SNVS.
When long press ON/OFF button(5 seconds),
PMIC_ON_REQ pin will be set to low and external
PMIC will be powered off.
And system can be powered on by long press ON/OFF
button again.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add SRAM support for i.MX6UL, it has 128KB ocram
starting from 0x900000.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
- A couple of fixes on i.MX31 and i.MX35 clock initialization functions
which makes mxc_timer_init() currently be called twice for DT boot.
- Increase i.MX6UL AXI bus clock rate to 264MHz which is the optimal
design target.
- Add a few missing clocks, ADC clock for i.MX7D, OCOTP clock for
Vybrid, and SPDIF_GCLK for i.MX6.
- A series from Lucas to fix early debug UART clock setup. This is
currently a one-off fix for i.MX platform, and can be extended to
become a generic solution later.
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Merge tag 'imx-clk-4.4' into imx/dt
The i.MX clock updates for 4.4:
- A couple of fixes on i.MX31 and i.MX35 clock initialization functions
which makes mxc_timer_init() currently be called twice for DT boot.
- Increase i.MX6UL AXI bus clock rate to 264MHz which is the optimal
design target.
- Add a few missing clocks, ADC clock for i.MX7D, OCOTP clock for
Vybrid, and SPDIF_GCLK for i.MX6.
- A series from Lucas to fix early debug UART clock setup. This is
currently a one-off fix for i.MX platform, and can be extended to
become a generic solution later.
The Sinovoip BPI-M2 is a SBC board based on the A31s SoC it features
1G RAM, a microsd slot, Gbit ethernet, 4 usb-a USB-2 ports, ir receiver,
stereo headphone jack and hdmi video output.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add a pinmux setting for using mmc2 in regular 4 bit mode.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
When the gpio interrupt bindings where changed to add a bank to the
specifier list, the r_pio nodes of A23/A31/A33 where not updated to
match and neither was the pio node of the A80, this fixes this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
With omap5-board-common.dtsi, we can now easily add support for various omap5
board variants. Let's add minimal support for isee igepv5.
So far I've tested that basic things work, such as serial, USB Ethernet, HDMI
and WLAN.
Note that like omap5-uevm, these boards seem to need to reserve 16MB for a
trap section as in commit 03178c66d2 ("ARM: dts: omap5-evm: Update
available memory to 2032 MB") and also noted in a u-boot commit at
http://marc.info/?l=u-boot&m=134376852603255 and also at
http://patchwork.ozlabs.org/patch/159881/.
Not sure why this is not needed for omap5-cm-t54.dts, maybe because of
different u-boot configuration.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Looks like thevarious omap5-uevm models and igepv5 are very similar. So let's
create omap5-board-common.dtsi to allow fixing up things properly for mainline
kernel to support all these.
Even if we eventually end up having only PMIC + MMC + eMMC + SDIO WLAN + SATA +
USB + HDMI configuration in the omap5-board-common.dtsi, this is the easiest
way to add support for other boards rather than diffing various versions of
out of tree dts files.
My guess is that also omap5-sbc-t54.dts can use this, but I don't have that
board so that will need to be dealt with later on.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit 99f84cae43 ("ARM: dts: add wl12xx/wl18xx bindings") added
device tree bindings for the TI WLAN SDIO on many omap variants.
I recall wondering how come omap5-uevm did not have the WLAN
added and this issue has been bugging me for a while now, and
I finally tracked it down to a bad pinmux regression, and a missing
deferred probe handling for the 32k clock from palmas that's
requested by twl6040.
Basically 392adaf796 ("ARM: dts: omap5-evm: Add mcspi data")
added pin muxing for mcspi4 that conflicts with the onboard
WLAN. While some omap5-uevm don't have WLAN populated, the
pins are not reused for other devices. And as the SDIO bus
should be probed, let's try to enable WLAN by default.
Let's fix the regression and add the WLAN configuration as
done for the other boards in 99f84cae43 ("ARM: dts: add
wl12xx/wl18xx bindings"). And let's use the new MMC pwrseq for
the 32k clock as suggested by Javier Martinez Canillas
<javier@dowhile0.org>.
Note that without a related deferred probe fix for twl6040,
the 32k clock is not initialized if palmas-clk is a module
and twl6040 is built-in.
Let's also use the generic "non-removable" instead of the
legacy "ti,non-removable" property while at it.
And finally, note that omap5 seems to require WAKEUP_EN for
the WLAN GPIO interrupt.
Fixes: 392adaf796 ("ARM: dts: omap5-evm: Add mcspi data")
Cc: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The newest revisions of A388-GP (v1.5 and higher) support only
DAT3-based card detection. Revisions < v1.5 based on GPIO detection
via I2C expander, but this solution is supposed to be deprecated on
new boards. In order to satisfy all type of hardware this commit
changes card detection to use software polling mechanism. Also a
comment is added on possible card detection options in A388-GP
DT board file.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The sorting policy for this file is alphabetically.
Reorder all nodes, that are out of place.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
The NMI interrupt controller is in charge of the NMI pin exposed by
the SoC to the PMIC. The PMIC signals interrupts through this.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add FPGA manager to device tree for SoCFPGA.
Signed-off-by: Alan Tull <atull@opensource.altera.com>
Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* Add RNG device tree node
* Add MSM8x16 serial UART1 node
* Enable eMMC on apq8016-sbc board
* Fix I2C pinconf sleep state function
* Add MSM8916 I2C nodes
* Enable I2C busses on LS and HS on APQ8016-sbc
* Enable SPI busses on LS and HS on APQ8016-sbc
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Merge tag 'qcom-arm64-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm into next/dt
Pull "Qualcomm ARM64 Updates for v4.4" from Andy Gross:
* Add RNG device tree node
* Add MSM8x16 serial UART1 node
* Enable eMMC on apq8016-sbc board
* Fix I2C pinconf sleep state function
* Add MSM8916 I2C nodes
* Enable I2C busses on LS and HS on APQ8016-sbc
* Enable SPI busses on LS and HS on APQ8016-sbc
* tag 'qcom-arm64-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm:
arm64: dts: apq8016-sbc: enable spi buses on LS and HS
arm64: dts: apq8016-sbc: enable i2c buses on LS and HS
arm64: dts: qcom: Add msm8916 I2C nodes.
arm64: dts: fix i2c pinconf sleep state function
arm64: dts: qcom: Enable eMMC on apq8016-sbc board
arm64: dts: qcom: Add 8x16 Serial UART1 node
arm64: dts: qcom: Add RNG device tree node
1. SRAM, MHU mailbox and SCPI support
2. CPU topology using cpu-map
3. Clock support for all the cpus
4. Support for SoC sensors
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Merge tag 'juno-scpi-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt
Merge "SCPI support on ARM64 Juno Development Platform" from Sudeep Holla:
1. SRAM, MHU mailbox and SCPI support
2. CPU topology using cpu-map
3. Clock support for all the cpus
4. Support for SoC sensors
* tag 'juno-scpi-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: Add sensor node to Juno dt
arm64: dts: add clock support for all the cpus
arm64: dts: add CPU topology on Juno
arm64: dts: add SRAM, MHU mailbox and SCPI support on Juno
- DCAN sleep pins for am437x-gp-evm
- A series of changes to add audio support for dra7
- Add support for gpio keys and LEDs on dra7
- Regulator clean-up for am335x-wega
- A series of changes to enable IOMMUs and mailboxes for dra7
accelerators
- Add support for am335x-bonegreen
- Fix up GPIO flags where 0 was used instead of GPIO_ACTIVE_HIGH
- Fix omap3-lilly-am33x IRQ level flag
- Remove duplicate uart2 pinmux for igep and fix indentation and
update igep to use pinctrl macros for the register offsets
- Fix MMC cd-gpios usage
Note that this branch is against v4.3-rc4 as that contains critical
MMC related fixes to boot with MMC working on most omaps.
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Merge tag 'omap-for-v4.4/dt-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "Device tree changes for omaps for v4.4 merge window:" from Tony Lindgren:
- DCAN sleep pins for am437x-gp-evm
- A series of changes to add audio support for dra7
- Add support for gpio keys and LEDs on dra7
- Regulator clean-up for am335x-wega
- A series of changes to enable IOMMUs and mailboxes for dra7
accelerators
- Add support for am335x-bonegreen
- Fix up GPIO flags where 0 was used instead of GPIO_ACTIVE_HIGH
- Fix omap3-lilly-am33x IRQ level flag
- Remove duplicate uart2 pinmux for igep and fix indentation and
update igep to use pinctrl macros for the register offsets
- Fix MMC cd-gpios usage
Note that this branch is against v4.3-rc4 as that contains critical
MMC related fixes to boot with MMC working on most omaps.
* tag 'omap-for-v4.4/dt-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (33 commits)
ARM: dts: omap3-igep: Use OMAP3_CORE1_IOPAD pinmux macro
ARM: dts: dra7xx: am57xx: fix cd-gpios definition as per hardware design and dt binding docs
ARM: dts: am43xx: fix cd-gpios definition as per hardware design and dt binding docs
ARM: dts: am335x: fix cd-gpios definition as per hardware design and dt binding docs
ARM: dts: omap3-igep0020: Remove duplicate uart2 pinmux
ARM: dts: omap3-igep: Fix indentation
ARM: dts: omap3-lilly-a83x: Don't use IRQ level flag for a GPIO
ARM: dts: DRA74x: Add IOMMU nodes for DSP2
ARM: dts: DRA7: Add common IOMMU nodes
ARM: dts: DRA74x: Add dsp2_system syscon node
ARM: dts: DRA7: Add dsp1_system syscon node
ARM: dts: Use defined GPIO constants in flags cell for OMAP2+ boards
ARM: dts: Add am335x-bonegreen
ARM: dts: beagle-x15: Enable the system mailboxes 5 and 6
ARM: dts: dra72-evm: Enable the system mailboxes 5 and 6
ARM: dts: dra7-evm: Enable the system mailboxes 5 and 6
ARM: dts: DRA72x: Add IPC sub-mailbox nodes for IPU1, IPU2 & DSP1
ARM: dts: DRA74x: Add IPC sub-mailbox nodes for all IPUs & DSPs
ARM: dts: am335x-wega: Clean up regulators
ARM: dts: dra7-evm: add gpio key support
...
- add missing CLKID_CPU for Berlin BG2Q
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Merge tag 'berlin-dt-cpuclk-for-4.4-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt
Pull "Marvell Berlin DT CPU clock for 4.4" from Sebastian Hesselbarth:
- add missing CLKID_CPU for Berlin BG2Q
* tag 'berlin-dt-cpuclk-for-4.4-1' of git://git.infradead.org/users/hesselba/linux-berlin:
ARM: berlin: dts: add CLKID_CPU for BG2Q
Marvell Berlin BG2Q SoC also has a clock for the CPU, add a
corresponding CLKID to the dt-binding include.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The Juno motherboard has a NOR flash on the motherboard, enable
this to be accessed with the CFI flash driver. Results after
enabling MTD, MTD_CFI, MTD_PHYSMAP, MTD_PHYSMAP_OF,
MTD_CFI_INTELEXT:
8000000.flash: Found 2 x16 devices at 0x0 in 32-bit bank.
Manufacturer ID 0x000089 Chip ID 0x008919
Intel/Sharp Extended Query Table at 0x010A
Intel/Sharp Extended Query Table at 0x010A
Intel/Sharp Extended Query Table at 0x010A
Intel/Sharp Extended Query Table at 0x010A
Intel/Sharp Extended Query Table at 0x010A
Using buffer write method
Using auto-unlock on power-up/resume
cfi_cmdset_0001: Erase suspend on write enabled
erase region 0: offset=0x0,size=0x40000,blocks=255
erase region 1: offset=0x3fc0000,size=0x10000,blocks=4
Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Enable the following on the porter board:
I2C2, PCI, PCIe, QSPI, SATA0, SDHI0/2, USB PHY and VIN0/ADV7180.
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Merge tag 'renesas-dt2-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Second Round of Renesas ARM Based SoC DT Updates for v4.4" from Simon Horman:
* Enable the following on the porter board:
I2C2, PCI, PCIe, QSPI, SATA0, SDHI0/2, USB PHY and VIN0/ADV7180.
* tag 'renesas-dt2-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: porter: enable internal PCI and USB PHY
ARM: shmobile: porter: enable PCIe
ARM: shmobile: porter: add QSPI DT support
ARM: shmobile: porter: add VIN0/ADV7180 DT support
ARM: shmobile: porter: add I2C2 DT support
ARM: shmobile: porter: enable SATA0
ARM: shmobile: porter: add SDHI0/2 DT support
In UniPhier SoCs before ProXstream2 and PH1-LD6b, two address spaces
0x00000000 - 0x0fffffff
0x40000000 - 0x4fffffff
are both mapped to the external bus (also called system bus),
so either was OK.
In the newest two SoCs, the former (0x00000000 - 0x0fffffff) is
assigned for the serial NOR interface.
For the consistency, use the latter for all the SoCs.
Also, fix the range properties to reflect the real address mapping,
where the support card is located at the offset address 0x01f00000
of CS1 of the external bus.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add support for new PLL-type for stih418 A9-PLL.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The B2199 board is mounted with Realtek RTL8367 switch.
We consider the bootloader will have intiliazed the switch before jumping into
the kernel, so we declare it as a fixed link.
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
