Move the trace before we signal the scheduler fence and drop the
scheduler fence reference directly before we free the job.
v2: keep extra s_fence reference
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Liu, Monk <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Replace some commonly repeated code with a function.
v2: Use amdgpu_find_mm_node() in amdgpu_ttm_io_mem_pfn()
Signed-off-by: Harish Kasiviswanathan <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Add more generic function amdgpu_copy_ttm_mem_to_mem() that supports
arbitrary copy size, offsets and two BOs (source & dest.).
This is useful for KFD Cross Memory Attach feature where data needs to
be copied from BOs from different processes
v2: Add struct amdgpu_copy_mem and changed amdgpu_copy_ttm_mem_to_mem()
function parameters to use the struct
v3: Minor function name change
Signed-off-by: Harish Kasiviswanathan <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
In amdgpu_cs_parser_init() in case of error handling
amdgpu_ctx_put() is called without setting p->ctx to NULL after that,
later amdgpu_cs_parser_fini() also calls amdgpu_ctx_put() again and
mess up the reference count.
Signed-off-by: Andrey Grodzovsky <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Instead of per device track the VRAM lost per context and return ECANCELED
instead of ENODEV.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Keep blocking the CS, but revert everything else. Mapping BOs and info IOCTL
are harmless and can still happen even when VRAM content ist lost.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Add a new huge page pool and try to allocate from it when it makes sense.
v2: avoid compound pages for now
Signed-off-by: Christian König <[email protected]>
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
SR-IOV need to exchange some data between PF&VF through shared VRAM
PF will copy some necessary firmware and information to the shared
VRAM. It also requires some information from VF. PF will send a
key through mailbox2 to help guest calculate checksum so that it can
verify whether the data is correct.
So check the data on the specified offset of the shared VRAM, if the
checksum is right, read values from it and write some VF information
next to the data from PF.
Signed-off-by: Horace Chen <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Helps avoiding deadlock during GPU reset.
Added mutex to amdgpu_ctx to preserve order of fences on a ring.
v2:
Put waiting logic in a function in a seperate function in amdgpu_ctx.c
Signed-off-by: Andrey Grodzovsky <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
This enables old fence waiting before reservation lock is aquired
which in turn is part of a bigger solution to deadlock happening
when gpu reset with VRAM recovery accures during intensive rendering.
Signed-off-by: Andrey Grodzovsky <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
The function uvd_v6_0_enc_get_destroy_msg is local to the source and
does not need to be in global scope, so make it static.
Cleans up sparse warning:
symbol 'uvd_v6_0_enc_get_destroy_msg' was not declared. Should it be
static?
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Colin Ian King <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
move functions in polaris_smc.c to
polaris10_smumgr.c and make all functions in
polaris10_smumgr.c static.
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
move functions in tonga_smc.c to tonga_smumgr.c
and make all functions in tonga_smumgr.c static.
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
move functions in iceland_smc.c to iceland_smumgr.c
and make all functions in iceland_smumgr.c static.
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
make all functions in fiji_smumgr.c static and
exported by pp_smumgr_func table.
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
in function amdgpu_ucode_init_bo, when failed, it will
set load_type to AMDGPU_FW_LOAD_DIRECT.
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Setting the function pointer to the get the temperature on CZ.
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Satyajit Sahu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Don't leak implementation details about how each priority behaves to
usermode. This allows greater flexibility in the future.
Squash into c2636dc53a
Signed-off-by: Andres Rodriguez <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
This ioctl will allow us to purge inactive userspace buffers when the
system is running out of contiguous memory.
For now, the purge logic is rather dumb in that it does not try to
release only the amount of BO needed to meet the last CMA alloc request
but instead purges all objects placed in the purgeable pool as soon as
we experience a CMA allocation failure.
Note that the in-kernel BO cache is always purged before the purgeable
cache because those objects are known to be unused while objects marked
as purgeable by a userspace application/library might have to be
restored when they are marked back as unpurgeable, which can be
expensive.
Signed-off-by: Boris Brezillon <[email protected]>
Signed-off-by: Eric Anholt <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
At least when they have vblank support they need to call this, or the
vblank core will happily call into their crtc->enable_vblank callback
even when the crtc is off. Which leads to a boom when the clocks are
off on most hardware (besides the inevitable confusion in the
book-keeping).
The consistency checks in drm_vblank.c will then make sure that
vblank_off/on calls are balanced, and if drivers forget to re-enable
it all the commits will stall, so I think we're covered.
It'd be nice to be able to place this check outside of commit helpers,
but tha's not really possible (due to nonblocking commits and all
that). Placing it into atomic helpers should at least cover most
drivers.
Also note that vblank support is still optional (for virtual drivers,
which tend to not have this), check for that.
v2: Fixup the handling for vblank_put (Rob).
Cc: Rob Clark <[email protected]>
Tested-by: Rob Clark <[email protected]>
Cc: Ville Syrjälä <[email protected]>
Reviewed-by: Ville Syrjälä <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
The default VGA device is normally set in vga_arbiter_add_pci_device() when
we call it for the first enabled device that can be accessed with the
legacy VGA resources ([mem 0xa0000-0xbffff], etc.)
That default device can be overridden by an EFI device that owns the boot
framebuffer. As a fallback, we can also select a VGA device that can't be
accessed via legacy VGA resources, or a VGA device that isn't even enabled.
Factor out this EFI and fallback selection from vga_arb_device_init() into
a separate vga_arb_select_default_device() function. This doesn't change
any behavior, but it untangles the "bridge control possible" checking and
messages from the default device selection.
Tested-by: Zhou Wang <[email protected]> # D05 Hisi Hip07, Hip08
Signed-off-by: Bjorn Helgaas <[email protected]>
Acked-by: Ard Biesheuvel <[email protected]>
Reviewed-by: Daniel Axtens <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/20171013034729.14630.30419.stgit@bhelgaas-glaptop.roam.corp.google.com
Daniel Axtens reported that on the HiSilicon D05 board, the VGA device is
behind a bridge that doesn't support PCI_BRIDGE_CTL_VGA, so the VGA arbiter
never selects it as the default, which means Xorg auto-detection doesn't
work.
VGA is a legacy PCI feature: a VGA device can respond to addresses, e.g.,
[mem 0xa0000-0xbffff], [io 0x3b0-0x3bb], [io 0x3c0-0x3df], etc., that are
not configurable by BARs. Consequently, multiple VGA devices can conflict
with each other. The VGA arbiter avoids conflicts by ensuring that those
legacy resources are only routed to one VGA device at a time.
The arbiter identifies the "default VGA" device, i.e., a legacy VGA device
that was used by boot firmware. It selects the first device that:
- is of PCI_CLASS_DISPLAY_VGA,
- has both PCI_COMMAND_IO and PCI_COMMAND_MEMORY enabled, and
- has PCI_BRIDGE_CTL_VGA set in all upstream bridges.
Some systems don't have such a device. For example, if a host bridge
doesn't support I/O space, PCI_COMMAND_IO probably won't be enabled for any
devices below it. Or, as on the HiSilicon D05, the VGA device may be
behind a bridge that doesn't support PCI_BRIDGE_CTL_VGA, so accesses to the
legacy VGA resources will never reach the device.
This patch extends the arbiter so that if it doesn't find a device that
meets all the above criteria, it selects the first device that:
- is of PCI_CLASS_DISPLAY_VGA and
- has PCI_COMMAND_IO or PCI_COMMAND_MEMORY enabled
If it doesn't find even that, it selects the first device that:
- is of class PCI_CLASS_DISPLAY_VGA.
Such a device may not be able to use the legacy VGA resources, but most
drivers can operate the device without those. Setting it as the default
device means its "boot_vga" sysfs file will contain "1", which Xorg (via
libpciaccess) uses to help select its default output device.
This fixes Xorg auto-detection on some arm64 systems (HiSilicon D05 in
particular; see the link below).
It also replaces the powerpc fixup_vga() quirk, albeit with slightly
different semantics: the quirk selected the first VGA device we found, and
overrode that selection with any enabled VGA device we found. If there
were several enabled VGA devices, the *last* one we found would become the
default.
The code here instead selects the *first* enabled VGA device we find, and
if none are enabled, the first VGA device we find.
Link: http://lkml.kernel.org/r/[email protected]
Tested-by: Daniel Axtens <[email protected]> # arm64, ppc64-qemu-tcg
Tested-by: Zhou Wang <[email protected]> # D05 Hisi Hip07, Hip08
Signed-off-by: Bjorn Helgaas <[email protected]>
Acked-by: Ard Biesheuvel <[email protected]>
Reviewed-by: Daniel Axtens <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/20171013034721.14630.65913.stgit@bhelgaas-glaptop.roam.corp.google.com
The A20 display pipeline has 2 frontends, 2 backends, and 2 TCONs.
This patch adds support (or a compatible string in the frontend's
case) for these components.
The TCONs support directly outputting to CPU/RGB/LVDS LCD panels,
or it can output to HDMI via an on-chip HDMI controller, or
CVBS/YPbPr/VGA signals via on-chip TV encoders. These additional
encoders are not covered in this patch.
Signed-off-by: Jonathan Liu <[email protected]>
[[email protected]: Expand commit message]
Signed-off-by: Chen-Yu Tsai <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
The A10 display pipeline has 2 frontends, 2 backends, and 2 TCONs.
This patch adds support (or a compatible string in the frontend's
case) for these components.
The TCONs support directly outputting to CPU/RGB/LVDS LCD panels,
or it can output to HDMI via an on-chip HDMI controller, or
CVBS/YPbPr/VGA signals via on-chip TV encoders. These additional
encoders are not covered in this patch.
Signed-off-by: Chen-Yu Tsai <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
The HDMI controller in the A10 SoC is the same as the one currently
supported in the A10s. It has slightly different setup parameters.
Since these parameters are not thoroughly understood, we add support
for this variant by copying these parameters verbatim.
Signed-off-by: Chen-Yu Tsai <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
The backend has a mux to select the destination of the data to output
to. It can select the TCON or the frontends. On the A20, it includes
an option to output to the second TCON. This is not documented in the
user manual, but the vendor kernel uses it nevertheless, so the second
backend outputs to the second TCON.
Although the muxing can be changed on the fly, DRM needs to be able to
group a bunch of layers such that they get switched to another crtc
together. This is because the display backend does the layer compositing,
while the TCON generates the display timings. This constraint is not
supported by DRM.
Here we simply pair up backends and TCONs with the same ID.
Signed-off-by: Chen-Yu Tsai <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
