CNSS_BDF_DUMMY type board data file is no longer used. Hence remove
it. A BDF file with regular name and dummy content should be sent as
dummy BDF instead of just sending a dummy string.
Change-Id: I7483a6801584f56ac4e87e2074280291c9734472
Signed-off-by: Yue Ma <[email protected]>
In fs_ready_store(), only dereference plat_priv pointer after NULL
check.
Change-Id: I222139d02a8cc8aef19e2ff879a953977896a08c
Signed-off-by: Yue Ma <[email protected]>
Currently the driver requires pwr_evt_irq to be compulsorily
passed from DT unless the core is dual port. Now consider a core
that does not allow SSPHY autosuspend during operational mode,
instead allowing it only as a part of dwc3_msm_ssphy_autosuspend.
As soon as autosuspend is enabled, there is a chance that
pwr_evt_irq is fired with IN_P3 bit set. Although the driver will
be marking mdwc->in_p3 in the pwr_evt_handler, it will fail to
see IN_P3 bit to be set(because it has been cleared in handler)
during the 5ms wait time in the ssphy_autosuspend function and
prepare_suspend will again set mdwc->in_p3 to 0. This leads to
failure of runtime/system suspend.
Fix this by not passing pwr_evt_irq from DT for the cores which
disable SSPHY autosuspend.
Change-Id: I85ca7e45337fe35c570d163766e7638e11537201
Signed-off-by: Ajay Agarwal <[email protected]>
F_FS function driver allocated ffs_eps and updates ffs_ep->ep
to corresponding usb_ep during func->bind and never clears it.
On bind it also saves ffs_ep context in epfile->ep.
During func->disable, it clears only ffs_ep context in epfile->ep
and on func->unbind it frees ffs_eps memory.
ffs_epfile_io routine currently relies on ffs_ep->ep (which is
never cleared and ffs_ep could be freed on unbind) to detect any
disconnect during active IO. This can result in various issues e.g.
use after free use of ffs_ep if unbind finished before epfile_io
could resume or "stop adbd" trying to dequeue a freed USB request
when epfile_io could execute only after F_FS got disabled as
'if (ep->ep)' check would be TRUE.
Fix this by checking stored ffs_ep context against latest epfile->ep
to figure out if endpoint got disabled or changed before acquiring
spin_lock.
Change-Id: I6bdcdf0dff0813ed7b2af8c24f544a22796b0369
Signed-off-by: Manu Gautam <[email protected]>
Signed-off-by: Mayank Rana <[email protected]>
Signed-off-by: Jack Pham <[email protected]>
Porting the FDE functionality from msm-4.14 branch commit
<b8f1b6a6> (Add support for block disk encryption).
Modified to be compatible with the 5.4 Kernel.
Test:
1. Basic_SimpleEncryption.
2. ModifyEnforcedFiles_FileCreationWithinEnforcedFolder.
3. PIN, pattern, password.
4. Verified filename encryption.
5. Generate/set ICE keys.
6. Enable ICE state for userdata partition.
7. Format the userdata partition.
8. Check if partition is encrypted via ICE.
Change-Id: I307d75b7cdf25f7a9ad2b4f948e64d13278e6f03
Signed-off-by: Neeraj Soni <[email protected]>
Signed-off-by: Victor Zaharchuk <[email protected]>
Different GPU can have a different GMEM size so need to configure
UCHE GMEM base address accordingly. Having a fix base as 0x100000
results in RB and UCHE GMEM range overlap on GPUs with GMEM size >1MB.
Also, adjust SVM 32bit base based on GMEM UCHE range end to prevent
GMEM UCHE and SVM 32bit range overlap.
Change-Id: I41330a33b79bf8c79b593ecd89593a796230b074
Signed-off-by: Deepak Kumar <[email protected]>
The version numbers shall be copied into the local variables for
any potential version comparison.
Change-Id: I08ac6359df0890a2605dbb6279b73abe09060ec8
Signed-off-by: Yong Ding <[email protected]>
The prink() could consume enough CPU when the retry eventually takes
a lot of times before it could succeed.
Change-Id: I4f49d0650ee3ae06700d2ce592acd0532bbf38cd
Signed-off-by: Yong Ding <[email protected]>
Since for the Genoa or the SP that doesn't need
regdb.bin for Hasting, it should happen search
regdb.bin failure issue that cause 60s timeout.
So add one compile macro CNSS_REQ_FW_DIRECT to
replace request_firmware_direct with request_
firmware for regdb.bin and only search the folder
that set by fw_path, which can avoid 60s timeout
while search file failure in the user space.
static const char * const fw_path[] = {
fw_path_para,
"/lib/firmware/updates/" UTS_RELEASE,
"/lib/firmware/updates",
"/lib/firmware/" UTS_RELEASE,
"/lib/firmware"
};
Above piece of code is the definition of fw_path
from drivers/base/firmware_loader/main.c.
Change-Id: I79c2fce33a8befecb0242a70b7eee1eef9a76e9b
Signed-off-by: Chaoli Zhou <[email protected]>
Signed-off-by: Kuichu Ni <[email protected]>
Currently power_role is accessed by set_prop and get_prop
functions of typec_power_role without any locking mechanism,
there can be a scenario where both function calls were invoked
simultaneously and power_role variable is not correctly
updated, and it leads to enumeration issues when connected to PC.
Fix it by adding locking mechanism to power_role.
Change-Id: I4f5dc38a9536b535510dc2b112712a5cbd2b3f84
Signed-off-by: Kavya Nunna <[email protected]>
In the process of idle shutdown, cnss_pci_power_off_mhi()
already done with CNSS_MHI_POWER_OFF state set, but
cnss_suspend_pci_link() doesn't complete yet, so PCI_LINK_DOWN
won't be set, at the same time system suspend comes, it will be
failed with CNSS_MHI_SUSPEND state set checking at
cnss_pci_suspend_bus()/cnss_pci_set_mhi_state().
When mhi state is already CNSS_MHI_POWER_OFF, no need to do pci
suspend link related operation while such actions also will be done
through cnss_qca6290_shutdown()/cnss_suspend_pci_link(). Fix is to
check CNSS_MHI_POWER_OFF state in cnss_pci_suspend_bus().
Change-Id: I2e03dffdc29b5c9743209cbd29c16345d414af35
Signed-off-by: Huashan Qu <[email protected]>
Only when SMMU S1 enabled, CNSS driver will send IOVA range in
HOST_CAP message, and let firmware to configure ATU.
Change-Id: Idd19063da975c0105d91e0e31575d0b0d1edd8e2
Signed-off-by: Lin Bai <[email protected]>
Currently CNSS2 driver does not support multi chips. This is a update of
the CNSS2 driver to support multi chips with converged dts.
Change-Id: Ie3efb526220c2de21e021320322d46c345d770bc
Signed-off-by: wei yang <[email protected]>
Signed-off-by: Kuichu Ni <[email protected]>
Remove all the leading and trailing whitespaces in the string copied
from userspace.
Change-Id: I627416dcdb1155303ad6a8ed172910a8653dd67b
Signed-off-by: Jay Jayanna <[email protected]>
Improve the api to better handle certain error scenarios
and move console prints outside of irq/locked code
sections.
Change-Id: I0ec6f37400949c014ea2e94f61a239294c954bf5
Signed-off-by: Neeraj Upadhyay <[email protected]>
On certain platforms, due to a HW issue, the SSPHY keeps
transitioning in and out of p3 whenever we perform any HS
transfers. This leads to a storm of PWR_EVNT irgs.
Fix this by disabling SSPHY autosuspend on such platforms.
Autosuspend will be enabled as part of dwc3_msm_prepare_suspend
so that SSPHY gets a chance to go into P3.
Change-Id: I4e674f780a72a8c4abcb3e6c9f083f23b1faa196
Signed-off-by: Aniket Randive <[email protected]>
In line with the sequence for primary port, update proper fields
of DWC3_GUSB2PHYCFG and DWC3_GUSB3PIPECTL registers for the
second port of the dual port controller. Update other registers
as required.
While at it, also avoid enabling SSPHY autosuspend if
dis_u3_susphy_quirk is set.
Change-Id: Ib79dba4c6d854fa2bf33a1b7cecf06f988250662
Signed-off-by: Ajay Agarwal <[email protected]>
Signed-off-by: Harsh Agarwal <[email protected]>
Certain targets may have a dual port capable host controller.
Add support for the PHY IRQs for the second port. Since the SSPHY
autosuspend will be disabled for such controllers, remove the
support of pwr_evnt_irq as a mandatory IRQ and allow SSPHY to go
into P3 as a part of suspend sequence. Handle the logic
gracefully to maintain single port controllers.
Change-Id: I5a53d6e23f64bec7ae940d23923df310309a28da
Signed-off-by: Ajay Agarwal <[email protected]>
Signed-off-by: Harsh Agarwal <[email protected]>
Add 2 new PHY instances (HS and SS) in dwc3 and dwc3-msm
structures. Probe and initialize them when the controller is
dual port capable. This capability is advertised by cores
supporting only host mode using the DT flag 'qcom,dual-port'.
Update PHY1 flags wherever applicable while maintaining single
port controller support.
Avoid workaround of SSPHY powerdown as a part of HS device
connect because of the known HW issue of the other SSPHY going in
and out of P3 when data transfers are being done.
Change-Id: If52fd6383cc2da8b763c774d2ad688448f90aea0
Signed-off-by: Ajay Agarwal <[email protected]>
Signed-off-by: Harsh Agarwal <[email protected]>
