Commit graph

873,238 commits

Author SHA1 Message Date
qctecmdr
dab37a02fd Merge "regulator: Fix formatting warnings in rpmh-regulator" 2019-11-04 15:49:45 -08:00
Jack Pham
66eae47677 usb: dwc3: Set vbus_active in peripheral-only mode
The recent change in commit 904ab34b54 ("usb: dwc3: ep0: Fail
enqueue() when racing with vbus_sess disconnect") added a check
to prevent queuing on ep0 if vbus_active is unset. However on
some configurations if dwc3 is configured as peripheral-only, this
flag is not set. In those cases, simply set vbus_active to true.

Change-Id: Iaf8612b924ead1484dc585377e7eb0a46cc89a16
Fixes: 904ab34b54 ("usb: dwc3: ep0: Fail enqueue() when racing with vbus_sess disconnect")
Signed-off-by: Jack Pham <[email protected]>
2019-11-04 14:55:57 -08:00
Abhijeet Dharmapurikar
891c257dd5 spmi: regmap: enable userspace writes
Being able to write to spmi registers via userspace is required
for quick debug and development. Enable it.

The regmap framework uses dev_name to create debugfs dir names.
So update the spmi devices to have proper names.

Change-Id: I8a5da203b212df9a7f1410e3fcf6ee7b429856b6
Signed-off-by: Abhijeet Dharmapurikar <[email protected]>
2019-11-04 11:36:31 -08:00
Subbaraman Narayanamurthy
5f54c6905c nvmem: Add snapshot of QTI SDAM driver
QTI SDAM driver allows PMIC peripherals to access the shared
memory that is available on QTI PMICs. Add device tree bindings
documentation for it.

This snapshot is taken as of msm-4.19
commit 9a702c565e5a ("Use 'GPL-2.0-only' as the
SPDX-License-Identifier tag").

Change-Id: If83c87a9e162b442b362f1b3af619d481514f7bf
Signed-off-by: Subbaraman Narayanamurthy <[email protected]>
[[email protected]: simplified with devm_nvem_register()]
Signed-off-by: David Collins <[email protected]>
2019-11-04 11:36:29 -08:00
Subbaraman Narayanamurthy
c0edd814da soc: qcom: Add snapshot of QTI PBS driver
QTI PBS (Programmable Boot Sequence) driver helps triggering
certain PBS on QTI PMICs when available for APPS.

This snapshot is taken as of msm-4.19
commit 9a702c565e5a ("Use 'GPL-2.0-only' as the
SPDX-License-Identifier tag").

Change-Id: I25b6f7cb2bf1cad1413c4389cd2e77e021016b3f
Signed-off-by: Subbaraman Narayanamurthy <[email protected]>
2019-11-04 11:36:28 -08:00
Jay Jayanna
23ad398aa7 soc: qcom: Add snapshot of GLINK_PKT Driver
This snapshot is taken as of msm-4.19 'commit <d2f41beab007i>
("Merge "msm: npu: Add bandwidth monitor support"")'.

Removed the debug mask as it is not used for debugging.

Change-Id: I1fb6dfa73dedd27594d6a5b66d2892d5436ec076
Signed-off-by: Jay Jayanna <[email protected]>
2019-11-04 11:27:34 -08:00
Jay Jayanna
0b32d1ebc5 arm64: defconfig: Enable SPSS GLINK driver on Lahaina
Enable glink driver for SPSS on Lahaina.

Change-Id: Ifdb3df82dcddb557a269ed271ef8c0d51abad07b
Signed-off-by: Jay Jayanna <[email protected]>
2019-11-04 11:20:24 -08:00
Can Guo
9c6fe1f3cb pinctrl: qcom: Expose ufs_reset as gpio on Lahaina
The ufs_reset pin is expected to be wired to the reset pin of the
primary UFS memory but is pretty much just a general purpose output pin.
Reorder the pins and expose it as gpio 203, so that the UFS driver can
toggle it.

Change-Id: I412e8a2aac51fd9434cbe63d4521ede31254d7fe
Signed-off-by: Can Guo <[email protected]>
2019-11-03 19:24:32 -08:00
Raghavendra Rao Ananta
566cf3462f soc: qcom: SSR: Fix registration order for wakeup source
wakeup_source_register() expects a registered struct device *.
But in the subsys_register() path, device_register() is called
after wakeup_source_register(), which is incorrect. Hence,
flip the order of registrations. Also as an extension, reorder
the error-handling path of subsys_register() and the cleanup
sequence in subsys_unregister().

Change-Id: I976951ddcf5635ec7931253bfcda834ef30c3898
Signed-off-by: Raghavendra Rao Ananta <[email protected]>
2019-11-03 09:56:03 -08:00
Vivek Aknurwar
cccaebcf74 clk: qcom: Add cam cc clock driver for Lahaina
Add camera clock driver to support camera
peripheral clocks.

Change-Id: I9d87129e9b08c884f75f0625d0edd83e339a4f9d
Signed-off-by: Vivek Aknurwar <[email protected]>
2019-11-02 16:14:09 -07:00
qctecmdr
812f0991f0 Merge "msm: ipa : Fix update of buffer recycle stats" 2019-11-02 04:16:39 -07:00
qctecmdr
31de1b639a Merge "scsi: qcom-ufs: Add support for bus voting using ICB framework" 2019-11-02 03:28:15 -07:00
qctecmdr
a45dd7ba9b Merge "coresight: byte-cntr: Add support for streaming interface for ETR" 2019-11-02 01:40:31 -07:00
qctecmdr
e62fdd4a18 Merge "Coresight: byte-cntr: Don't read byte-cntr when etr is diasbled" 2019-11-02 00:53:49 -07:00
qctecmdr
c517e81542 Merge "coresight: Add snapshot of Coresight byte counter driver" 2019-11-02 00:14:04 -07:00
qctecmdr
1693a05458 Merge "coresight: tmc: migrate byte counter to new tmc framework" 2019-11-01 23:26:52 -07:00
qctecmdr
1f695d7a99 Merge "coresight: tmc: Read the TMC mode register only if clk is enabled" 2019-11-01 22:47:53 -07:00
qctecmdr
706967db49 Merge "serial: msm_geni_serial: Double clock-divider for kona based hw" 2019-11-01 22:11:43 -07:00
qctecmdr
2b7be99444 Merge "clk: qcom: Set BRANCH_HALT_SKIP for clocks controlled by PMU" 2019-11-01 21:32:08 -07:00
qctecmdr
7ac2a92541 Merge "clk: dt-bindings: gcc: Add PCIE AXI clocks" 2019-11-01 20:53:44 -07:00
qctecmdr
0e46785388 Merge "clk: qcom: Update gcc clk parent mappings and hw ctrl flag" 2019-11-01 20:06:43 -07:00
qctecmdr
b58a50349a Merge "msm: ipa: Retry gsi channel stop for producer channels" 2019-11-01 19:21:06 -07:00
qctecmdr
c2157915a1 Merge "msm: ipa: Disable csum offload and status for ODL pipe" 2019-11-01 18:37:35 -07:00
Jishnu Prakash
cc4ca3f412 platform: qpnp-revid: Add REVID support for PM8008, SMB1355 and SMB1390
Add PMIC subtypes for PM8008, SMB1355 and SMB1390.

Change-Id: I03929a86686aa5e3affde1c7a208f29e1639aadd
Signed-off-by: Jishnu Prakash <[email protected]>
2019-11-01 18:06:45 -07:00
Kiran Gunda
f0ba71a517 platform: qpnp-revid: Add REVID support for PM6125
Add PMIC subtype and revid details for PM6125.

Change-Id: Ibd185198ba74e31a0c89f640e7de4fdb94f4157d
Signed-off-by: Kiran Gunda <[email protected]>
2019-11-01 18:06:44 -07:00
Umang Agrawal
644e9e5a3c platform: qpnp-revid: Add REVID support for PM7250B
Add PMIC subtype and revid details for PM7250B.

Change-Id: I1d5f28b9130f00ec30ee9935914d847652cc7435
Signed-off-by: Umang Agrawal <[email protected]>
2019-11-01 18:06:42 -07:00
Subbaraman Narayanamurthy
f2fd74c45c platform: msm: Add snapshot of QPNP_REVID driver
QPNP_REVID driver provides the PMIC revision, type and subtype
of every PMIC device to the peripheral drivers on request. This
is used by peripheral drivers to configure the hardware properly.

This is taken as a snapshot from msm-4.19 kernel
commit 9a702c565e5a ("Use 'GPL-2.0-only' as the
SPDX-License-Identifier tag").

Change-Id: Ieee794353be062104230e3e01c3b2c3b7a3d2c16
Signed-off-by: Subbaraman Narayanamurthy <[email protected]>
[[email protected]: replace snprintf with scnprintf]
Signed-off-by: David Collins <[email protected]>
2019-11-01 18:06:41 -07:00
Subbaraman Narayanamurthy
03206e3b75 spmi: spmi-pmic-arb-debug: Change the probe init order
Currently, both the regular and debug spmi pmic arbiter devices
are probed in the same initcall order (arch_init). This is fine.
However, most of the sepolicy rules set in the userspace are
for the PMIC devices under spmi-0 bus. If the debug spmi pmic
arbiter device probes first and takes "spmi-0" name, then the
sepolicy rules set will be broken. Fix it by changing the
probe init order of debug spmi pmic arbiter device to module
init.

Change-Id: I145e78a205bc80f274d8d926353a88255a7f4167
Signed-off-by: Subbaraman Narayanamurthy <[email protected]>
2019-11-01 18:06:39 -07:00
David Collins
8ea34f4d2f spmi: spmi-pmic-arb-debug: add clock management support
Add support to enable and disable the clock used by the SPMI PMIC
arbiter debug bus.  This is needed to avoid unclocked accesses.

Change-Id: If9eee1317a88c143452d8b46b89aff89d1e956b7
Signed-off-by: David Collins <[email protected]>
2019-11-01 18:06:38 -07:00
David Collins
bb67ea43af spmi: add SPMI PMIC arbiter debug bus driver
Add a new SPMI bus driver which can manage the SPMI debug bus
found on SPMI PMIC arbiter version 5 and above.  This debug
bus has read and write access to all PMIC peripherals regardless
of ownership configurations.  It cannot be used on production
devices because it is disabled by an eFuse.

Change-Id: I7dd7171d775db02269b98bb079bdccf5d0f4aae4
Signed-off-by: David Collins <[email protected]>
2019-11-01 18:06:36 -07:00
Guru Das Srinagesh
5b36ca42b5 mfd: introduce I2C PMIC controller
The I2C PMIC Controller is used by multi-function PMIC devices
which communicate over the I2C bus.  The controller enumerates
all child nodes as platform devices, and instantiates a regmap
interface for them to communicate over the I2C bus.

The controller also controls interrupts for all of the children
platform devices.  The controller handles the summary interrupt
by deciphering which peripheral triggered the interrupt, and
which of the peripheral interrupts were triggered.  Finally, it
calls the interrupt handlers for each of the virtual interrupts
that were registered.

This is a snapshot from msm-4.19
commit 9a702c565e5a ("Use 'GPL-2.0-only' as the
SPDX-License-Identifier tag").

Change-Id: I28a4905e1666c06cb2c06d00f56ef66981621b2d
Signed-off-by: Nicholas Troast <[email protected]>
Signed-off-by: Guru Das Srinagesh <[email protected]>
Signed-off-by: David Collins <[email protected]>
2019-11-01 18:06:35 -07:00
qctecmdr
2b33271cfb Merge "dcc_v2: Remove duplicate function" 2019-11-01 17:55:20 -07:00
qctecmdr
f15a282d80 Merge "msm:ipa: unvote PCIe clock only if it was voted before" 2019-11-01 17:08:28 -07:00
qctecmdr
cd32660da5 Merge "msm: ipa: fix race condition between USB connect and modem SSR" 2019-11-01 16:23:41 -07:00
qctecmdr
ab15b23ddd Merge "msm: gsi: Set cookie correctly for GCI channel TREs" 2019-11-01 15:38:23 -07:00
qctecmdr
db2c2903f4 Merge "msm: ipa3: Change smmu mapping logs to low priority" 2019-11-01 14:55:59 -07:00
Bojun Pan
791e8ab19a msm: ipa : Fix update of buffer recycle stats
The stats for tmp allocs should be updated only if additional
buffers are available.

Change-Id: Ic064f87a54e37ef046d6761c79664e1ea830d04c
Acked-by: Priyadarshini Rajagopal <[email protected]>
Signed-off-by: Bojun Pan <[email protected]>
2019-11-01 14:49:31 -07:00
David Collins
4354299c32 thermal: qcom-spmi-temp-alarm: add support for GEN2 rev 1 PMIC peripherals
Add support for TEMP_ALARM GEN2 PMIC peripherals with digital
major revision 1.  This revision utilizes a different temperature
threshold mapping than earlier revisions.

Change-Id: Iaae5c64558d1ac7fb87d2f5a5b2baa26bf1c38eb
Signed-off-by: David Collins <[email protected]>
2019-11-01 14:38:15 -07:00
David Collins
497dff9805 pinctrl: qcom: spmi-gpio: add support for PM*8350* PMIC variants
Add support for qcom,pm8350-gpio, qcom,pm8350b-gpio,
qcom,pm8350c-gpio, and qcom,pmk8350-gpio variants.

Change-Id: I9f914a4e0c54997665bff8372f7fd2c57efccf14
Signed-off-by: David Collins <[email protected]>
2019-11-01 14:38:14 -07:00
David Collins
e9e26d44be pinctrl: qcom: spmi-gpio: correct parent irqspec translation
pmic_gpio_child_to_parent_hwirq() and
gpiochip_populate_parent_fwspec_fourcell() translate a pinctrl-
spmi-gpio irqspec to an SPMI controller irqspec.  When they do
this, they use a fixed SPMI slave ID of 0 and a fixed GPIO
peripheral offset of 0xC0 (corresponding to SPMI address 0xC000).
This translation results in an incorrect irqspec for secondary
PMICs that don't have a slave ID of 0 as well as for PMIC chips
which have GPIO peripherals located at a base address other than
0xC000.

Correct this issue by passing the slave ID of the pinctrl-spmi-
gpio device's parent in the SPMI controller irqspec and by
calculating the peripheral ID base from the device tree 'reg'
property of the pinctrl-spmi-gpio device.

Change-Id: If04a7ca73b995dd99939d340f2d33d4488197de0
Signed-off-by: David Collins <[email protected]>
2019-11-01 14:38:12 -07:00
Anirudh Ghayal
e20a3a1beb pinctrl: qcom: spmi-gpio: Fix the GPIO strength mapping
The SPMI based PMICs have the HIGH and LOW GPIO output
strength mappings interchanged, fix them.

Keep the mapping same for older SSBI based PMICs.

CRs-Fixed: 2246473
Change-Id: I4ec78469c436b54642ee67108943c82fba46e1c4
Signed-off-by: Anirudh Ghayal <[email protected]>
2019-11-01 14:38:11 -07:00
Subbaraman Narayanamurthy
3f96cb1a83 pinctrl: qcom: spmi-gpio: add support to enable/disable output
Currently, if the GPIO is configured as output in the bootloader
and user changes the mode to input in HLOS, it would end up
getting configured as input/output. Functionally, this is fine;
however, there may be some requirements where the output needs
to be disabled so that it can be used only for input.

Add support to enable/disable output mode through "output-enable"
or "output-disable" pinctrl properties.

Change-Id: Ie857f94d529a6209bcb82ef3775d414f19d5678a
Signed-off-by: Subbaraman Narayanamurthy <[email protected]>
2019-11-01 14:38:10 -07:00
Abhijeet Dharmapurikar
5a5e52e13f mfd: qcom-spmi-pmic: instantiate pmic peripherals at arch_initcall
The spmi_devices spawn platform devices for pmic peripherals. Some of these
devices are required early on in the boot process.

Initialize the driver at arch_initcall to avoid unnecessary probe
deferrals.

Change-Id: I38474bedcb284ed5a7df1ec8d26f680787f2c074
Signed-off-by: Abhijeet Dharmapurikar <[email protected]>
Signed-off-by: Subbaraman Narayanamurthy <[email protected]>
[[email protected]: add module exit function]
Signed-off-by: David Collins <[email protected]>
2019-11-01 14:37:38 -07:00
David Collins
a4d2754961 mfd: qcom-spmi-pmic: add support for slow SPMI busses
Add device tree support for configuring if mutexes or spinlocks
should be used in the regmap configuration (i.e. the fast_io
element value).  This ensures that qcom-spmi-pmic slave devices
can be used with SPMI busses that must operate in process
context.

Change-Id: I3abdee36935457db497ce6ff2a242755fc3aff90
Signed-off-by: David Collins <[email protected]>
Signed-off-by: Subbaraman Narayanamurthy <[email protected]>
2019-11-01 14:30:00 -07:00
Subbaraman Narayanamurthy
ff2fb11b08 spmi: spmi-pmic-arb: Fix hw_irq overflow
Currently, when handling the SPMI summary interrupt, the hw_irq
number is calculated based on SID, Peripheral ID, IRQ index and
APID. This is then passed to irq_find_mapping() to see if a
mapping exists for this hw_irq and if available, invoke the
interrupt handler. Since the IRQ index uses an "int" type, hw_irq
which is of unsigned long data type can take a large value when
SID has its MSB set to 1 and the type conversion happens. Because
of this, irq_find_mapping() returns 0 as there is no mapping
for this hw_irq. This ends up invoking cleanup_irq() as if
the interrupt is spurious whereas it is actually a valid
interrupt. Fix this by using the proper data type (u32) for id.

CRs-Fixed: 2357600
Change-Id: I451e33d61e063d3a9381c2b43767946117a5bbb9
Signed-off-by: Subbaraman Narayanamurthy <[email protected]>
2019-11-01 14:20:32 -07:00
Yimin Peng
ac4ae512b2 spmi: pmic-arb: support updating interrupt type flags
Have the qpnpint_irq_set_type function clear unwanted high/low
trigger bits when updating the interrupt flags.

Change-Id: Ie55d6178ea94350ecf8c79714cb863ea63d76ea6
Signed-off-by: Yimin Peng <[email protected]>
Signed-off-by: Subbaraman Narayanamurthy <[email protected]>
2019-11-01 14:20:31 -07:00
David Collins
e4f7eef56d spmi: spmi-pmic-arb: increase SPMI transaction timeout delay
Increase the SPMI transaction timeout delay from 100 us to
1000 us in order to account for the slower execution time
found on some simulator targets.

Change-Id: I5805fa77131336e56db35ae7948012e072c15746
Signed-off-by: David Collins <[email protected]>
2019-11-01 14:20:29 -07:00
David Collins
0cf5f1b07b spmi: spmi-pmic-arb: block access for invalid PMIC arbiter v5 SPMI writes
The system crashes due to an access permission violation when
writing to a PMIC peripheral which is not owned by the current
ee.  Add a check for PMIC arbiter version 5 for such invalid
write requests and return an error instead of crashing the
system.

Change-Id: If601a8c737f10be2a7d1e894f7285cf0de4eb4a5
Signed-off-by: David Collins <[email protected]>
2019-11-01 14:20:28 -07:00
David Collins
27abf44b3c spmi: spmi-pmic-arb: correct duplicate APID to PPID mapping logic
Correct the way that duplicate PPID mappings are handled for PMIC
arbiter v5.  The final APID mapped to a given PPID should be the
one which has write owner = APPS EE, if it exists, or if not
that, then the first APID mapped to the PPID, if it exists.

Change-Id: I387e25d5e0d29434a6191faaf887db1e1a90243d
Signed-off-by: David Collins <[email protected]>
2019-11-01 14:20:20 -07:00
Ashay Jaiswal
12684b27b8 spmi-pmic-arb: add support to dispatch interrupt based on IRQ status
Current implementation of SPMI arbiter dispatches interrupt based on the
Arbiter's accumulator status, in some cases the accumulator status may
remain zero and the interrupt remains un-handled. Add logic to dispatch
interrupts based Arbiter's IRQ status if the accumulator status is zero.

Change-Id: I068f5c7d33758063878721d7cce1308fa803e3bd
Signed-off-by: Ashay Jaiswal <[email protected]>
Signed-off-by: David Collins <[email protected]>
2019-11-01 14:18:11 -07:00