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844,881 commits

Author SHA1 Message Date
Dave Airlie
a956c56b6a panfrost- Avoid double free by deleting GEM handle in create_bo failure
path (Boris)
 
 Cc: Boris Brezillon <[email protected]>
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEEfxcpfMSgdnQMs+QqlvcN/ahKBwoFAl0dRFUACgkQlvcN/ahK
 Bwokcwf/aNT6EGTUsQZK1AHzoA6YN7o5Hgpng0Ut/Co67DN2QKj6FKGQxQKQ+uMf
 a/pKufg1yHUOd+lJm/MgJl1fAy0mqDv75LAO1askAusWqGZulRcpEbUwMmYs02v5
 xt1nHpPB7rvLCQsUK0vurX9E4HJ7VsHiaeDcWXRybc7XKxdafJVDPxOyzk+z3fpK
 ZxaRj8SjlWTS0NREcAPaPJQWhbr1Uf+FaNQuqnX/p7bHXtavq4SqouW42DM0bx7D
 sbGLEtvB/iusozOwQ6aXzRWdeCX7haYPPprJn78dlDJof1A9TU9cmLOgqtq9EHEL
 4yorb/aj3aDgsnmqC4BBZ17fnq6axw==
 =EjV2
 -----END PGP SIGNATURE-----

Merge tag 'drm-misc-fixes-2019-07-03' of git://anongit.freedesktop.org/drm/drm-misc into drm-fixes

panfrost- Avoid double free by deleting GEM handle in create_bo failure
          path (Boris)

Cc: Boris Brezillon <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>

From: Sean Paul <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/20190704001302.GA260390@art_vandelay
2019-07-04 11:17:48 +10:00
Dave Airlie
5ee5d30a81 Merge tag 'drm-fixes-5.2-2019-07-02' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
drm-fixes-5.2-2019-07-02:

Fixes for stable

amdgpu:
- stability fix for gfx9
- regression fix for HG on some polaris boards
- crash fix for some new OEM boards

Signed-off-by: Dave Airlie <[email protected]>
From: Alex Deucher <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-07-04 11:17:23 +10:00
Linus Torvalds
179c96d9f7 A single fixup for the SPI CS gpios that regressed
in the current kernel cycle.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJdHJ83AAoJEEEQszewGV1zStUP/joc3S0VFFVXQjCxzZysQbpw
 cea8SVMOvhaDYp+lQugDIqyYQsSbD+kstozHNsyL1rgRoL5WWESrA65acmDIuEaO
 C30uqg6C/MJ9VgTg0m0DKLCWpfz8ZCTsfah8Ln8l1uYOmBNdK5dpzx5YZT+Ir3m5
 a+NoH77t1xRERrtiFjwYLgZB1/HX6FCTF6xglSX8ni1TL1yyMzLBBcd8+EA/TFWY
 ngXy/bnJKixPDVPTFspXQl3+8QwerHMmXxxs02vDpYW3wVDJiOvrHa/63tMswPce
 3K2Ir1tHkU2EhbdY0Dr9xEDFbXF3jGsN6Na1Xb/shlYMT7v5wp99eLPwV32sAGzu
 NWDxPezPmbm1dzMmjodh8rh57Tuy4wTFPZoo0El2xHmmphB5lcL7IfqpqTZ0zP/y
 3/7tQePtcvT0NmDC7HLQjqeoEwBenTA7m5jUO0GJ2++T0FbE3wLH/7Q4IX1L8W9S
 BFXiejhDVbkWwjPpq6MbXEtfaDGDFrWb8mgvY/H3iTzGtl5z6lALtFC12eyQWiqs
 bz/YnrFyAcf2ZlCoLQzoWnN4TDXIEA5bdhaQIswVkwOhPCYq9qb9YrX7MI++vRnh
 soIWZ0I84Vl5oKdTq78OJUggHiTI5rJA5xQaUtqOIDD+HoXWr7Sb6H2aUda9uP0Y
 jD8KvOJnZNUGxkt5IdiQ
 =C8n2
 -----END PGP SIGNATURE-----

Merge tag 'gpio-v5.2-4' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO fix from Linus Walleij:
 "A single fixup for the SPI CS gpios that regressed in the current
  kernel cycle"

* tag 'gpio-v5.2-4' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio:
  gpio/spi: Fix spi-gpio regression on active high CS
2019-07-04 09:59:08 +09:00
Srinivas Kandagatla
9aa0cf7956
ASoC: qdsp6: q6afe-dai: Add missing Slimbus0 audio route
For some reason SLIMBus RX0 playback is not added to audio routes.
This patch adds the missing route.

Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
2019-07-04 00:03:10 +01:00
Srinivas Kandagatla
74b35a74f8
ASoC: core: Return -ENOTSUPP from set_channel_map() if no operation provided
It makes it easier for common code to work with snd_soc_dai_set_channel_map()
by distinguishing between operation not being supported and an error.
This is done inline with others snd_soc_dai.* apis.

Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
2019-07-04 00:02:52 +01:00
Bob Moore
02a93f35f5 ACPICA: Update version to 20190703
ACPICA commit 450ffd8b9c100db561ecf23063620cb107d68c30

Version 20190703.

Link: 450ffd8b
Signed-off-by: Bob Moore <[email protected]>
Signed-off-by: Erik Schmauss <[email protected]>
Signed-off-by: Rafael J. Wysocki <[email protected]>
2019-07-04 00:59:44 +02:00
Erik Schmauss
c522ad0637 ACPICA: Update table load object initialization
ACPICA commit c7ef9f3526765bed8930825dda1eed1a274b9668

Use the common internal "initialize objects" interface
Affects:
 Load()
 load_table()
 acpi_load_table

Link: c7ef9f35
Signed-off-by: Bob Moore <[email protected]>
Signed-off-by: Erik Schmauss <[email protected]>
Signed-off-by: Rafael J. Wysocki <[email protected]>
2019-07-04 00:59:43 +02:00
Bob Moore
86a33cf3b6 ACPICA: Update for object initialization sequence
ACPICA commit 106c72a97f5ca972f29956e5e9a0429b8c4a2723

 1) Do not allow the objects to be initialized twice
 2) Only package objects require a deferred initialization
 3) Cleanup initialization output

Link: 106c72a9
Signed-off-by: Bob Moore <[email protected]>
Signed-off-by: Erik Schmauss <[email protected]>
Signed-off-by: Rafael J. Wysocki <[email protected]>
2019-07-04 00:59:43 +02:00
Erik Schmauss
8894f52a14 ACPICA: remove legacy module-level code due to deprecation
ACPICA commit 1ca34b1a7b960ef321eae5dcddfff77707c88aef

There have been several places that have been calling functions
regarding module level code blocks. This change removes all old
vestiges in the codebase. This is dead code.

Link: 1ca34b1a
Signed-off-by: Erik Schmauss <[email protected]>
Signed-off-by: Bob Moore <[email protected]>
Signed-off-by: Rafael J. Wysocki <[email protected]>
2019-07-04 00:59:43 +02:00
Bob Moore
f79c8e4136 ACPICA: Namespace: simplify creation of the initial/default namespace
ACPICA commit 76658f55d8cc498a763bdb92f8e0d934822a129c

For the objects that are created by default (_GPE, _SB_, etc)
there is no need to use the heavyweight ns_lookup function.
Instead, simply create each object and link it in as the namespace
is built.

Link: 76658f55
Signed-off-by: Bob Moore <[email protected]>
Signed-off-by: Erik Schmauss <[email protected]>
Signed-off-by: Rafael J. Wysocki <[email protected]>
2019-07-04 00:59:43 +02:00
Rafael J. Wysocki
d4ca763eed Merge ACPI tables handling changes for v5.3. 2019-07-04 00:59:15 +02:00
Paul Menzel
3b2d4dcf71 nfsd: Fix overflow causing non-working mounts on 1 TB machines
Since commit 10a68cdf10 (nfsd: fix performance-limiting session
calculation) (Linux 5.1-rc1 and 4.19.31), shares from NFS servers with
1 TB of memory cannot be mounted anymore. The mount just hangs on the
client.

The gist of commit 10a68cdf10 is the change below.

    -avail = clamp_t(int, avail, slotsize, avail/3);
    +avail = clamp_t(int, avail, slotsize, total_avail/3);

Here are the macros.

    #define min_t(type, x, y)       __careful_cmp((type)(x), (type)(y), <)
    #define clamp_t(type, val, lo, hi) min_t(type, max_t(type, val, lo), hi)

`total_avail` is 8,434,659,328 on the 1 TB machine. `clamp_t()` casts
the values to `int`, which for 32-bit integers can only hold values
−2,147,483,648 (−2^31) through 2,147,483,647 (2^31 − 1).

`avail` (in the function signature) is just 65536, so that no overflow
was happening. Before the commit the assignment would result in 21845,
and `num = 4`.

When using `total_avail`, it is causing the assignment to be
18446744072226137429 (printed as %lu), and `num` is then 4164608182.

My next guess is, that `nfsd_drc_mem_used` is then exceeded, and the
server thinks there is no memory available any more for this client.

Updating the arguments of `clamp_t()` and `min_t()` to `unsigned long`
fixes the issue.

Now, `avail = 65536` (before commit 10a68cdf10 `avail = 21845`), but
`num = 4` remains the same.

Fixes: c54f24e338 (nfsd: fix performance-limiting session calculation)
Cc: [email protected]
Signed-off-by: Paul Menzel <[email protected]>
Signed-off-by: J. Bruce Fields <[email protected]>
2019-07-03 17:51:31 -04:00
Thomas Gleixner
049331f277 x86/fsgsbase: Revert FSGSBASE support
The FSGSBASE series turned out to have serious bugs and there is still an
open issue which is not fully understood yet.

The confidence in those changes has become close to zero especially as the
test cases which have been shipped with that series were obviously never
run before sending the final series out to LKML.

  ./fsgsbase_64 >/dev/null
  Segmentation fault

As the merge window is close, the only sane decision is to revert FSGSBASE
support. The revert is necessary as this branch has been merged into
perf/core already and rebasing all of that a few days before the merge
window is not the most brilliant idea.

I could definitely slap myself for not noticing the test case fail when
merging that series, but TBH my expectations weren't that low back
then. Won't happen again.

Revert the following commits:
539bca535d ("x86/entry/64: Fix and clean up paranoid_exit")
2c7b5ac5d5 ("Documentation/x86/64: Add documentation for GS/FS addressing mode")
f987c955c7 ("x86/elf: Enumerate kernel FSGSBASE capability in AT_HWCAP2")
2032f1f96e ("x86/cpu: Enable FSGSBASE on 64bit by default and add a chicken bit")
5bf0cab60e ("x86/entry/64: Document GSBASE handling in the paranoid path")
708078f657 ("x86/entry/64: Handle FSGSBASE enabled paranoid entry/exit")
79e1932fa3 ("x86/entry/64: Introduce the FIND_PERCPU_BASE macro")
1d07316b13 ("x86/entry/64: Switch CR3 before SWAPGS in paranoid entry")
f60a83df45 ("x86/process/64: Use FSGSBASE instructions on thread copy and ptrace")
1ab5f3f7fe ("x86/process/64: Use FSBSBASE in switch_to() if available")
a86b462513 ("x86/fsgsbase/64: Enable FSGSBASE instructions in helper functions")
8b71340d70 ("x86/fsgsbase/64: Add intrinsics for FSGSBASE instructions")
b64ed19b93 ("x86/cpu: Add 'unsafe_fsgsbase' to enable CR4.FSGSBASE")

Signed-off-by: Thomas Gleixner <[email protected]>
Acked-by: Ingo Molnar <[email protected]>
Cc: Chang S. Bae <[email protected]>
Cc: Andy Lutomirski <[email protected]>
Cc: Borislav Petkov <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: Andi Kleen <[email protected]>
Cc: Ravi Shankar <[email protected]>
Cc: Dave Hansen <[email protected]>
Cc: H. Peter Anvin <[email protected]>
2019-07-03 16:35:23 +02:00
Andy Lutomirski
697096b144 selftests/x86/fsgsbase: Fix some test case bugs
This refactors do_unexpected_base() to clean up some code.  It also
fixes the following bugs in test_ptrace_write_gsbase():

 - Incorrect printf() format string caused crashes.

 - Hardcoded 0x7 for the gs selector was not reliably correct.

It also documents the fact that the test is expected to fail on old
kernels.

Fixes: a87730cc3a ("selftests/x86/fsgsbase: Test ptracer-induced GSBASE write with FSGSBASE")
Fixes: 1b6858d5a2 ("selftests/x86/fsgsbase: Test ptracer-induced GSBASE write")
Signed-off-by: Andy Lutomirski <[email protected]>
Signed-off-by: Thomas Gleixner <[email protected]>
Cc:  "BaeChang Seok" <[email protected]>
Cc: Borislav Petkov <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: "H . Peter Anvin" <[email protected]>
Cc: Andi Kleen <[email protected]>
Cc: H. Peter Anvin <[email protected]>
Cc: "BaeChang Seok" <[email protected]>
Link: https://lkml.kernel.org/r/bab29c84f2475e2c30ddb00f1b877fcd7f4f96a8.1562125333.git.luto@kernel.org
2019-07-03 16:24:56 +02:00
Lionel Debieve
f3880a2356 crypto: stm32/hash - remove interruptible condition for dma
When DMA is used, waiting for completion must not be
interruptible as it can generate an error that is not handle
by the driver. There is no need to put the completion
interruptible in this driver.

Signed-off-by: Lionel Debieve <[email protected]>
Signed-off-by: Herbert Xu <[email protected]>
2019-07-03 22:15:08 +08:00
Lionel Debieve
0acabecebc crypto: stm32/hash - Fix hmac issue more than 256 bytes
Correct condition for the second hmac loop. Key must be only
set in the first loop. Initial condition was wrong,
HMAC_KEY flag was not properly checked.

Signed-off-by: Lionel Debieve <[email protected]>
Signed-off-by: Herbert Xu <[email protected]>
2019-07-03 22:15:08 +08:00
Lionel Debieve
fdbd643a74 crypto: stm32/crc32 - rename driver file
Use the same naming convention for all stm32 crypto
drivers.

Signed-off-by: Lionel Debieve <[email protected]>
Signed-off-by: Herbert Xu <[email protected]>
2019-07-03 22:15:07 +08:00
Fuqian Huang
66d9c1cf9f crypto: amcc - remove memset after dma_alloc_coherent
In commit af7ddd8a62
("Merge tag 'dma-mapping-4.21' of git://git.infradead.org/users/hch/dma-mapping"),
dma_alloc_coherent has already zeroed the memory.
So memset is not needed.

Signed-off-by: Fuqian Huang <[email protected]>
Signed-off-by: Herbert Xu <[email protected]>
2019-07-03 22:13:12 +08:00
Hook, Gary
600bac009e crypto: ccp - Switch to SPDX license identifiers
Add an SPDX identifier and remove any specific statements.

Signed-off-by: Gary R Hook <[email protected]>
Signed-off-by: Herbert Xu <[email protected]>
2019-07-03 22:13:12 +08:00
Hook, Gary
52393d617a crypto: ccp - Validate the the error value used to index error messages
The error code read from the queue status register is only 6 bits wide,
but we need to verify its value is within range before indexing the error
messages.

Fixes: 81422badb3 ("crypto: ccp - Make syslog errors human-readable")
Cc: <[email protected]>
Reported-by: Cfir Cohen <[email protected]>
Signed-off-by: Gary R Hook <[email protected]>
Signed-off-by: Herbert Xu <[email protected]>
2019-07-03 22:13:12 +08:00
Hook, Gary
ae400be94b crypto: doc - Fix formatting of new crypto engine content
Tidy up the formatting/grammar in crypto_engine.rst. Use bulleted lists
where appropriate.

Signed-off-by: Gary R Hook <[email protected]>
Signed-off-by: Herbert Xu <[email protected]>
2019-07-03 22:13:12 +08:00
Hook, Gary
5a35316d97 crypto: doc - Add parameter documentation
Fill in missing parameter descriptions for the compression algorithm,
then pick them up to document for the compression_alg structure.

Signed-off-by: Gary R Hook <[email protected]>
Signed-off-by: Herbert Xu <[email protected]>
2019-07-03 22:13:12 +08:00
Ard Biesheuvel
7367bfeb2c crypto: arm64/aes-ce - implement 5 way interleave for ECB, CBC and CTR
This implements 5-way interleaving for ECB, CBC decryption and CTR,
resulting in a speedup of ~11% on Marvell ThunderX2, which has a
very deep pipeline and therefore a high issue latency for NEON
instructions operating on the same registers.

Note that XTS is left alone: implementing 5-way interleave there
would either involve spilling of the calculated tweaks to the
stack, or recalculating them after the encryption operation, and
doing either of those would most likely penalize low end cores.

For ECB, this is not a concern at all, given that we have plenty
of spare registers. For CTR and CBC decryption, we take advantage
of the fact that v16 is not used by the CE version of the code
(which is the only one targeted by the optimization), and so we
can reshuffle the code a bit and avoid having to spill to memory
(with the exception of one extra reload in the CBC routine)

Signed-off-by: Ard Biesheuvel <[email protected]>
Signed-off-by: Herbert Xu <[email protected]>
2019-07-03 22:13:12 +08:00
Ard Biesheuvel
e217413964 crypto: arm64/aes-ce - add 5 way interleave routines
In preparation of tweaking the accelerated AES chaining mode routines
to be able to use a 5-way stride, implement the core routines to
support processing 5 blocks of input at a time. While at it, drop
the 2 way versions, which have been unused for a while now.

Signed-off-by: Ard Biesheuvel <[email protected]>
Signed-off-by: Herbert Xu <[email protected]>
2019-07-03 22:13:12 +08:00
Christophe Leroy
d45b1714e2 crypto: talitos - drop icv_ool
icv_ool is not used anymore, drop it.

Fixes: e345177ded ("crypto: talitos - fix AEAD processing.")
Signed-off-by: Christophe Leroy <[email protected]>
Signed-off-by: Herbert Xu <[email protected]>
2019-07-03 22:13:11 +08:00
Christophe Leroy
58cdbc6d22 crypto: talitos - fix hash on SEC1.
On SEC1, hash provides wrong result when performing hashing in several
steps with input data SG list has more than one element. This was
detected with CONFIG_CRYPTO_MANAGER_EXTRA_TESTS:

[   44.185947] alg: hash: md5-talitos test failed (wrong result) on test vector 6, cfg="random: may_sleep use_finup src_divs=[<reimport>25.88%@+8063, <flush>24.19%@+9588, 28.63%@+16333, <reimport>4.60%@+6756, 16.70%@+16281] dst_divs=[71.61%@alignmask+16361, 14.36%@+7756, 14.3%@+"
[   44.325122] alg: hash: sha1-talitos test failed (wrong result) on test vector 3, cfg="random: inplace use_final src_divs=[<flush,nosimd>16.56%@+16378, <reimport>52.0%@+16329, 21.42%@alignmask+16380, 10.2%@alignmask+16380] iv_offset=39"
[   44.493500] alg: hash: sha224-talitos test failed (wrong result) on test vector 4, cfg="random: use_final nosimd src_divs=[<reimport>52.27%@+7401, <reimport>17.34%@+16285, <flush>17.71%@+26, 12.68%@+10644] iv_offset=43"
[   44.673262] alg: hash: sha256-talitos test failed (wrong result) on test vector 4, cfg="random: may_sleep use_finup src_divs=[<reimport>60.6%@+12790, 17.86%@+1329, <reimport>12.64%@alignmask+16300, 8.29%@+15, 0.40%@+13506, <reimport>0.51%@+16322, <reimport>0.24%@+16339] dst_divs"

This is due to two issues:
- We have an overlap between the buffer used for copying the input
data (SEC1 doesn't do scatter/gather) and the chained descriptor.
- Data copy is wrong when the previous hash left less than one
blocksize of data to hash, implying a complement of the previous
block with a few bytes from the new request.

Fix it by:
- Moving the second descriptor after the buffer, as moving the buffer
after the descriptor would make it more complex for other cipher
operations (AEAD, ABLKCIPHER)
- Skip the bytes taken from the new request to complete the previous
one by moving the SG list forward.

Fixes: 37b5e8897e ("crypto: talitos - chain in buffered data for ahash on SEC1")
Cc: [email protected]
Signed-off-by: Christophe Leroy <[email protected]>
Signed-off-by: Herbert Xu <[email protected]>
2019-07-03 22:13:11 +08:00
Christophe Leroy
d44769e4cc crypto: talitos - move struct talitos_edesc into talitos.h
Moves struct talitos_edesc into talitos.h so that it can be used
from any place in talitos.c

It will be required for next patch ("crypto: talitos - fix hash
on SEC1")

Signed-off-by: Christophe Leroy <[email protected]>
Cc: [email protected]
Signed-off-by: Herbert Xu <[email protected]>
2019-07-03 22:13:11 +08:00
Christophe Leroy
aeb8724653 lib/scatterlist: Fix mapping iterator when sg->offset is greater than PAGE_SIZE
All mapping iterator logic is based on the assumption that sg->offset
is always lower than PAGE_SIZE.

But there are situations where sg->offset is such that the SG item
is on the second page. In that case sg_copy_to_buffer() fails
properly copying the data into the buffer. One of the reason is
that the data will be outside the kmapped area used to access that
data.

This patch fixes the issue by adjusting the mapping iterator
offset and pgoffset fields such that offset is always lower than
PAGE_SIZE.

Signed-off-by: Christophe Leroy <[email protected]>
Fixes: 4225fc8555 ("lib/scatterlist: use page iterator in the mapping iterator")
Cc: [email protected]
Signed-off-by: Herbert Xu <[email protected]>
2019-07-03 22:13:11 +08:00
Eric Biggers
21d4120ec6 crypto: user - prevent operating on larval algorithms
Michal Suchanek reported [1] that running the pcrypt_aead01 test from
LTP [2] in a loop and holding Ctrl-C causes a NULL dereference of
alg->cra_users.next in crypto_remove_spawns(), via crypto_del_alg().
The test repeatedly uses CRYPTO_MSG_NEWALG and CRYPTO_MSG_DELALG.

The crash occurs when the instance that CRYPTO_MSG_DELALG is trying to
unregister isn't a real registered algorithm, but rather is a "test
larval", which is a special "algorithm" added to the algorithms list
while the real algorithm is still being tested.  Larvals don't have
initialized cra_users, so that causes the crash.  Normally pcrypt_aead01
doesn't trigger this because CRYPTO_MSG_NEWALG waits for the algorithm
to be tested; however, CRYPTO_MSG_NEWALG returns early when interrupted.

Everything else in the "crypto user configuration" API has this same bug
too, i.e. it inappropriately allows operating on larval algorithms
(though it doesn't look like the other cases can cause a crash).

Fix this by making crypto_alg_match() exclude larval algorithms.

[1] https://lkml.kernel.org/r/[email protected]
[2] 20190517/testcases/kernel/crypto/pcrypt_aead01.c

Reported-by: Michal Suchanek <[email protected]>
Fixes: a38f7907b9 ("crypto: Add userspace configuration API")
Cc: <[email protected]> # v3.2+
Cc: Steffen Klassert <[email protected]>
Signed-off-by: Eric Biggers <[email protected]>
Signed-off-by: Herbert Xu <[email protected]>
2019-07-03 22:11:55 +08:00
Vincent Whitchurch
1a0fad630e crypto: cryptd - Fix skcipher instance memory leak
cryptd_skcipher_free() fails to free the struct skcipher_instance
allocated in cryptd_create_skcipher(), leading to a memory leak.  This
is detected by kmemleak on bootup on ARM64 platforms:

 unreferenced object 0xffff80003377b180 (size 1024):
   comm "cryptomgr_probe", pid 822, jiffies 4294894830 (age 52.760s)
   backtrace:
     kmem_cache_alloc_trace+0x270/0x2d0
     cryptd_create+0x990/0x124c
     cryptomgr_probe+0x5c/0x1e8
     kthread+0x258/0x318
     ret_from_fork+0x10/0x1c

Fixes: 4e0958d19b ("crypto: cryptd - Add support for skcipher")
Cc: <[email protected]>
Signed-off-by: Vincent Whitchurch <[email protected]>
Signed-off-by: Herbert Xu <[email protected]>
2019-07-03 22:11:55 +08:00
Herbert Xu
c8ea9fce2b lib/mpi: Fix karactx leak in mpi_powm
Sometimes mpi_powm will leak karactx because a memory allocation
failure causes a bail-out that skips the freeing of karactx.  This
patch moves the freeing of karactx to the end of the function like
everything else so that it can't be skipped.

Reported-by: [email protected]
Fixes: cdec9cb516 ("crypto: GnuPG based MPI lib - source files...")
Cc: <[email protected]>
Signed-off-by: Herbert Xu <[email protected]>
Reviewed-by: Eric Biggers <[email protected]>
Signed-off-by: Herbert Xu <[email protected]>
2019-07-03 22:11:55 +08:00
Ingo Molnar
a328a259ce perf/core improvements and fixes:
perf metrics:
 
   Andi Kleen:
 
   - Fixes for SkylakeX and CascadeLakeX Intel vendor events.
 
   - Avoid extra ':' for --raw metrics.
 
   - Don't include duration_time in group.
 
 perf script:
 
   Arnaldo Carvalho de Melo/Jiri Olsa:
 
   - Fix processing guest samples.
 
 perf diff:
 
   Jin Yao:
 
   - Do diffs by basic blocks.
 
 objtool:
 
   Jiri Olsa:
 
   - Fix build by linking against tools/lib/ctype.o sources.
 
 perf pmu:
 
   John Garry:
 
   - Support more complex PMU event aliasing.
 
   - Add support for Hisi hip08 DDRC, HHA and L3C PMU aliasing.
 
 Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQR2GiIUctdOfX2qHhGyPKLppCJ+JwUCXRwf8wAKCRCyPKLppCJ+
 J1vWAP0Sb+7Z0B2q3hDzDIhxT8GRdmrZRQUxQBekbCGQfpw2mwD/fK2IhHLY3+bM
 ISyWUCpNO54RQjJiHc4hdBYAAjSgGgg=
 =MI1S
 -----END PGP SIGNATURE-----

Merge tag 'perf-core-for-mingo-5.3-20190703' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/core

Pull perf/core improvements and fixes from Arnaldo Carvalho de Melo:

perf metrics:

  Andi Kleen:

  - Fixes for SkylakeX and CascadeLakeX Intel vendor events.

  - Avoid extra ':' for --raw metrics.

  - Don't include duration_time in group.

perf script:

  Arnaldo Carvalho de Melo/Jiri Olsa:

  - Fix processing guest samples.

perf diff:

  Jin Yao:

  - Do diffs by basic blocks.

objtool:

  Jiri Olsa:

  - Fix build by linking against tools/lib/ctype.o sources.

perf pmu:

  John Garry:

  - Support more complex PMU event aliasing.

  - Add support for Hisi hip08 DDRC, HHA and L3C PMU aliasing.

Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
Signed-off-by: Ingo Molnar <[email protected]>
2019-07-03 15:55:48 +02:00
Ingo Molnar
a041ede090 perf/core improvements and fixes:
perf annotate:
 
   Mao Han:
 
   - Add support for the csky processor architecture.
 
 perf stat:
 
   Andi Kleen:
 
   - Fix metrics with --no-merge.
 
   - Don't merge events in the same PMU.
 
   - Fix group lookup for metric group.
 
 Intel PT:
 
   Adrian Hunter:
 
   - Improve CBR (Core to Bus Ratio) packets support.
 
   - Fix thread stack return from kernel for kernel only case.
 
   - Export power and ptwrite events to sqlite and postgresql.
 
 core libraries:
 
   Arnaldo Carvalho de Melo:
 
   - Find routines in tools/perf/util/ that have implementations in the kernel
     libraries (lib/*.c), such as strreplace(), strim(), skip_spaces() and reuse
     them after making a copy into tools/lib and tools/include/.
 
     This continues the effort of having tools/ code looking as much as possible
     like kernel source code, to help encourage people to work on both the kernel
     and in tools hosted in the kernel sources.
 
     That in turn will help moving stuff that uses those routines to
     tools/lib/perf/ where they will be made available for use in other tools.
 
     In the process ditch old cruft, remove unused variables and add missing
     include directives for headers providing things used in places that were
     building by sheer luck.
 
   Kyle Meyer:
 
   - Bump MAX_NR_CPUS and MAX_CACHES to get these tools to work on more machines.
 
 Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQR2GiIUctdOfX2qHhGyPKLppCJ+JwUCXRq6NgAKCRCyPKLppCJ+
 J6ekAP48ZwkxFF2kET3fgIwOL6G4+cQ8t7s2Mz1lYqLDW24NqAEAqNSpKdT60mKy
 6o+ZWjb2PtTt2F26OdoPoZvx8Txvgw8=
 =cxKY
 -----END PGP SIGNATURE-----

Merge tag 'perf-core-for-mingo-5.3-20190701' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/core

Pull perf/core improvements and fixes from Arnaldo Carvalho de Melo:

perf annotate:

  Mao Han:

  - Add support for the csky processor architecture.

perf stat:

  Andi Kleen:

  - Fix metrics with --no-merge.

  - Don't merge events in the same PMU.

  - Fix group lookup for metric group.

Intel PT:

  Adrian Hunter:

  - Improve CBR (Core to Bus Ratio) packets support.

  - Fix thread stack return from kernel for kernel only case.

  - Export power and ptwrite events to sqlite and postgresql.

core libraries:

  Arnaldo Carvalho de Melo:

  - Find routines in tools/perf/util/ that have implementations in the kernel
    libraries (lib/*.c), such as strreplace(), strim(), skip_spaces() and reuse
    them after making a copy into tools/lib and tools/include/.

    This continues the effort of having tools/ code looking as much as possible
    like kernel source code, to help encourage people to work on both the kernel
    and in tools hosted in the kernel sources.

    That in turn will help moving stuff that uses those routines to
    tools/lib/perf/ where they will be made available for use in other tools.

    In the process ditch old cruft, remove unused variables and add missing
    include directives for headers providing things used in places that were
    building by sheer luck.

  Kyle Meyer:

  - Bump MAX_NR_CPUS and MAX_CACHES to get these tools to work on more machines.

Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
Signed-off-by: Ingo Molnar <[email protected]>
2019-07-03 15:54:24 +02:00
Christoph Hellwig
d665e12aa7 block: nr_phys_segments needs to be zero for REQ_OP_WRITE_ZEROES
Fix a regression introduced when removing bi_phys_segments for Write Zeroes
requests, which need to have a segment count of zero, as they don't have a
payload.

Fixes: 14ccb66b3f ("block: remove the bi_phys_segments field in struct bio")
Reported-by: Jens Axboe <[email protected]>
Signed-off-by: Christoph Hellwig <[email protected]>
Signed-off-by: Jens Axboe <[email protected]>
2019-07-03 07:20:40 -06:00
Enrico Weigelt
4d19addd6b gpio: pl061: drop duplicate printing of device name
The dev_info() call already prints the device name, so there's
no need to explicitly include it in the message for second time.

Signed-off-by: Enrico Weigelt <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>
2019-07-03 14:34:49 +02:00
Jerome Brunet
751bd5db52
ASoC: meson: axg-tdm-formatter: add reset
Add the optional reset line handling which is present on the new SoC
families, such as the g12a. Triggering this reset is not critical but
it helps solve a channel shift issue on the g12a.

Signed-off-by: Jerome Brunet <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
2019-07-03 13:21:34 +01:00
Jerome Brunet
094380ea2b
ASoC: meson: axg-tdm-formatter: add reset to the bindings documentation
Add an optional reset property to the tdm formatter bindings. The
dedicated reset line is present on some SoC families, such as the g12a.

Signed-off-by: Jerome Brunet <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
2019-07-03 13:21:24 +01:00
David Howells
7a1ade8475 keys: Provide KEYCTL_GRANT_PERMISSION
Provide a keyctl() operation to grant/remove permissions.  The grant
operation, wrapped by libkeyutils, looks like:

	int ret = keyctl_grant_permission(key_serial_t key,
					  enum key_ace_subject_type type,
					  unsigned int subject,
					  unsigned int perm);

Where key is the key to be modified, type and subject represent the subject
to which permission is to be granted (or removed) and perm is the set of
permissions to be granted.  0 is returned on success.  SET_SECURITY
permission is required for this.

The subject type currently must be KEY_ACE_SUBJ_STANDARD for the moment
(other subject types will come along later).

For subject type KEY_ACE_SUBJ_STANDARD, the following subject values are
available:

	KEY_ACE_POSSESSOR	The possessor of the key
	KEY_ACE_OWNER		The owner of the key
	KEY_ACE_GROUP		The key's group
	KEY_ACE_EVERYONE	Everyone

perm lists the permissions to be granted:

	KEY_ACE_VIEW		Can view the key metadata
	KEY_ACE_READ		Can read the key content
	KEY_ACE_WRITE		Can update/modify the key content
	KEY_ACE_SEARCH		Can find the key by searching/requesting
	KEY_ACE_LINK		Can make a link to the key
	KEY_ACE_SET_SECURITY	Can set security
	KEY_ACE_INVAL		Can invalidate
	KEY_ACE_REVOKE		Can revoke
	KEY_ACE_JOIN		Can join this keyring
	KEY_ACE_CLEAR		Can clear this keyring

If an ACE already exists for the subject, then the permissions mask will be
overwritten; if perm is 0, it will be deleted.

Currently, the internal ACL is limited to a maximum of 16 entries.

For example:

	int ret = keyctl_grant_permission(key,
					  KEY_ACE_SUBJ_STANDARD,
					  KEY_ACE_OWNER,
					  KEY_ACE_VIEW | KEY_ACE_READ);

Signed-off-by: David Howells <[email protected]>
2019-07-03 13:05:22 +01:00
Jarkko Nikula
8cc7720470
spi: pxa2xx: Add support for Intel Elkhart Lake
Intel Elkhart Lake has the same LPSS than Intel Broxton. Add support for
it.

Signed-off-by: Jarkko Nikula <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
2019-07-03 13:03:44 +01:00
Bartosz Golaszewski
ba2bf340ad
regulator: max77650: add MODULE_ALIAS()
Define a MODULE_ALIAS() in the regulator sub-driver for max77650 so that
the appropriate module gets loaded together with the core mfd driver.

Signed-off-by: Bartosz Golaszewski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
2019-07-03 13:02:59 +01:00
Colin Ian King
a3c7c029c3
regulator: max77620: remove redundant assignment to variable ret
The variable ret is being initialized with a value that is never
read and it is being updated later with a new value. The
initialization is redundant and can be removed.

Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
2019-07-03 13:02:38 +01:00
Geert Uytterhoeven
5004efbb36 Documentation: ABI: power: Add missing newline at end of file
"git diff" says:

    \ No newline at end of file

after modifying the files.

Signed-off-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Rafael J. Wysocki <[email protected]>
2019-07-03 13:21:32 +02:00
Andy Shevchenko
417a564c65 ACPI / PMIC: intel: Drop double removal of address space handler
There is no need to remove address space handler twice,
because removal is idempotent.

Signed-off-by: Andy Shevchenko <[email protected]>
Signed-off-by: Rafael J. Wysocki <[email protected]>
2019-07-03 13:03:41 +02:00
Colin Ian King
b244883ca8 ACPI: APD: remove redundant assignment to pointer clk
The pointer clk is being initialized with a value that is never
read and it is being updated later with a new value. The
initialization is redundant and can be removed.

Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King <[email protected]>
Signed-off-by: Rafael J. Wysocki <[email protected]>
2019-07-03 13:02:16 +02:00
Mauro Carvalho Chehab
5d8cbf7176 docs: extcon: convert it to ReST and move to ACPI dir
The intel-int3496.txt file is a documentation for an ACPI driver.

There's no reason to keep it on a separate directory.

So, instead of keeping it on some random location, move it
to a sub-directory inside the ACPI documentation dir,
renaming it to .rst.

Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Acked-by: Chanwoo Choi <[email protected]>
Signed-off-by: Rafael J. Wysocki <[email protected]>
2019-07-03 13:00:26 +02:00
Thomas Gleixner
9b979ac3ce irqchip updates for Linux 5.3:
- ACPI support for the exiu and mb86s7x drivers
 - New Renesas RZ/A1, Amazon al-fic drivers
 - Add quirk for Amazon Graviton GICv2m widget
 - Large Renesas driver cleanup
 - CSky mpintc trigger type fixes
 - Meson G12A driver support
 - Various minor cleanups
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCgAzFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAl0cb8IVHG1hcmMuenlu
 Z2llckBhcm0uY29tAAoJECPQ0LrRPXpDBswP/2LtygcOLwgnbDMpnhUObHazid8U
 pmgd7l59ByxqL7HlnDytYwreC5pc9GII2DqiHEeTdeZUb9058M5PWuwYK4g+pIbs
 uR02A83iUr4tZbB5EJdiO6wEFfvu56j6h+6jP+1QPrtF9c+7I+q4RR3yVTfmq/WN
 pDd28ab1G1nzjWDLWC/I+U4uPxFkahlpGVVhvb4QneN4jwqKbnEJ3Pw6Uyoe8YDK
 3EOw3WmitVJQvRYGlVOzUFDfMYNI/ATAyFZOwX85jJNSyygMVofHm1ZATp+EjfGE
 kYPnuLVDKeMkp5SBFWk4SWzzZR6Gw1c/UQmZySHKRU48U2MD8ALnZrgK/T9gJGct
 oJeMLX1aNIPUStG7tYM3sPTw0qli2KN0K8wQGan1izxSIZsM1f22ALPPtC6QmBaE
 JJtEfvPGpwhz67R+lgANFQwx+hdcHA5IfjZ5pNvb4j5nDKNE3qYhdQBhG+wMbdt+
 /oQk/ytbOqc3R24t5BJw5Fyb2Sc3L9ua1tAa21Om5mr3C0qrCbSTFCp78BC9KJJH
 YuNJLsvvd24sHGe/Lj01NlRR9jbxvEnZy/IWpDQx9lhuXozJ5y9drvLpDX+tUZ6g
 aYXjyDYcNK1SbDlkORxfYdmOKNXtAa6iXsMveqwhpLUJPDR3NZ4SACxMg2sbPfAx
 urQ1HWASqzDZ8b1A
 =GCV9
 -----END PGP SIGNATURE-----

Merge tag 'irqchip-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core

Pull irqchip updates for Linux 5.3 from Marc Zyngier:

 - ACPI support for the exiu and mb86s7x drivers
 - New Renesas RZ/A1, Amazon al-fic drivers
 - Add quirk for Amazon Graviton GICv2m widget
 - Large Renesas driver cleanup
 - CSky mpintc trigger type fixes
 - Meson G12A driver support
 - Various minor cleanups
2019-07-03 11:18:55 +02:00
Michael Kelley
dd2cb34861 clocksource/drivers: Continue making Hyper-V clocksource ISA agnostic
Continue consolidating Hyper-V clock and timer code into an ISA
independent Hyper-V clocksource driver.

Move the existing clocksource code under drivers/hv and arch/x86 to the new
clocksource driver while separating out the ISA dependencies. Update
Hyper-V initialization to call initialization and cleanup routines since
the Hyper-V synthetic clock is not independently enumerated in ACPI.

Update Hyper-V clocksource users in KVM and VDSO to get definitions from
the new include file.

No behavior is changed and no new functionality is added.

Suggested-by: Marc Zyngier <[email protected]>
Signed-off-by: Michael Kelley <[email protected]>
Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Vitaly Kuznetsov <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: Sunil Muthuswamy <[email protected]>
Cc: KY Srinivasan <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Link: https://lkml.kernel.org/r/[email protected]
2019-07-03 11:00:59 +02:00
Michael Kelley
fd1fea6834 clocksource/drivers: Make Hyper-V clocksource ISA agnostic
Hyper-V clock/timer code and data structures are currently mixed
in with other code in the ISA independent drivers/hv directory as
well as the ISA dependent Hyper-V code under arch/x86.

Consolidate this code and data structures into a Hyper-V clocksource driver
to better follow the Linux model. In doing so, separate out the ISA
dependent portions so the new clocksource driver works for x86 and for the
in-process Hyper-V on ARM64 code.

To start, move the existing clockevents code to create the new clocksource
driver. Update the VMbus driver to call initialization and cleanup routines
since the Hyper-V synthetic timers are not independently enumerated in
ACPI.

No behavior is changed and no new functionality is added.

Suggested-by: Marc Zyngier <[email protected]>
Signed-off-by: Michael Kelley <[email protected]>
Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Vitaly Kuznetsov <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: Sunil Muthuswamy <[email protected]>
Cc: KY Srinivasan <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "[email protected]" <[email protected]>
Link: https://lkml.kernel.org/r/[email protected]
2019-07-03 11:00:59 +02:00
Thomas Gleixner
3419240495 Merge branch 'timers/vdso' into timers/core
so the hyper-v clocksource update can be applied.
2019-07-03 10:50:21 +02:00
Sameer Pujar
3dae67ce60 irqchip/gic-pm: Remove PM_CLK dependency
gic-pm driver does not use pm-clk interface now and hence the dependency
is removed from Kconfig.

Signed-off-by: Sameer Pujar <[email protected]>
Acked-by: Jon Hunter <[email protected]>
Signed-off-by: Marc Zyngier <[email protected]>
2019-07-03 09:33:01 +01:00