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Filename Latest commit message Latest commit date
Depeng Shao 00b8521d2a msm: camera: isp: Reset CSID sw register before reset clock domain
Reset CSID SW register firstly to cut off potential input source
before reset the HW logic, then HW logic won't get junk data.

CRs-Fixed: 2731158
Change-Id: I9c8e1f3776229bf96c0c712de8c083b1334702ef
Signed-off-by: Depeng Shao <depengs@codeaurora.org>
2020-08-06 15:55:04 +08:00
config Merge "msm: camera: common: Add support of PHY TPG deinitialization" into camera-kernel.lnx.4.0 2020-07-29 12:51:57 -07:00
drivers msm: camera: isp: Reset CSID sw register before reset clock domain 2020-08-06 15:55:04 +08:00
include/uapi
Makefile