Repository files (latest commit first)

Filename	Latest commit message	Latest commit date
Harikrishna Shenoy f60168e62f phy: cadence: cdns-dphy: Enable lower resolutions in dphy ... [ Upstream commit 43bd2c44515f8ee5c019ce6e6583f5640387a41b ] Enable support for data lane rates between 80-160 Mbps cdns dphy as mentioned in TRM [0] by setting the pll_opdiv field to 16. This change enables lower resolutions like 640x480 at 60Hz. [0]: https://www.ti.com/lit/zip/spruil1 (Table 12-552. DPHY_TX_PLL_CTRL Register Field Descriptions) Reviewed-by: Udit Kumar <u-kumar1@ti.com> Reviewed-by: Devarsh Thakkar <devarsht@ti.com> Signed-off-by: Harikrishna Shenoy <h-shenoy@ti.com> Link: https://lore.kernel.org/r/20250807052002.717807-1-h-shenoy@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>		2025-12-03 12:45:11 +01:00
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allwinner
amlogic
broadcom
cadence	phy: cadence: cdns-dphy: Enable lower resolutions in dphy	2025-12-03 12:45:11 +01:00
freescale
hisilicon
lantiq
marvell
mediatek
motorola
mscc
qualcomm
ralink
renesas	phy: renesas: rcar-gen3-usb2: Set timing registers only once	2025-06-04 14:32:29 +02:00
rockchip
samsung	phy: exynos5-usbdrd: fix MPLL_MULTIPLIER and SSC_REFCLKSEL masks in refclk	2025-03-13 12:43:25 +01:00
socionext
st
tegra	phy: Fix error handling in tegra_xusb_port_init	2025-06-04 14:32:29 +02:00
ti	phy: ti-pipe3: fix device leak at unbind	2025-10-02 13:34:30 +02:00
Kconfig
Makefile
phy-core-mipi-dphy.c
phy-core.c	phy: core: don't require set_mode() callback for phy_get_mode() to work	2025-06-04 14:32:33 +02:00
phy-lpc18xx-usb-otg.c
phy-pistachio-usb.c
phy-xgene.c