android_kernel_motorola_sm6375/qcom/sa8155-adp-common.dtsi
Nitesh Gupta 437dbaca6f ARM: dts: msm: Adding all CoreTech DT Changes to Mainline 5.4
Changes Included:-

1.) PCIE:- 3185343
2.) USB:- 3185077 3337896 3353566
3.) BUSES:- 3178854 3181107 3226742 3218985 3380173
4.) STORAGE:- 3366250 3261571.

Change-Id: I0765efaa30aed15f659e75b9c641fee0f9dfe20f
2020-12-21 19:28:58 -08:00

59 lines
1.1 KiB
Devicetree

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "sa8155-pmic-overlay.dtsi"
&qupv3_3 {
status = "ok"
};
&ufsphy_mem {
compatible = "qcom,ufs-phy-qmp-v4";
vdda-pll-supply = <&pm8150_2_l8>;
vdda-phy-max-microamp = <87100>;
vdda-pll-max-microamp = <18300>;
status = "ok"
};
&ufshc_mem {
vdd-hba-supply = <&ufs_phy_gdsc>;
vdd-hba-fixed-regulator;
vcc-supply = <&pm8150_1_l10>;
vcc-voltage-level = <2950000 2960000>;
vccq2-supply = <&pm8150_1_s4>;
vcc-max-microamp = <750000>;
vccq2-max-microamp = <750000>;
qcom,vddp-ref-clk-supply = <&pm8150_2_l5>;
qcom,vddp-ref-clk-max-microamp = <100>;
status = "ok"
};
&pcie1 {
qcom,boot-option = <0x0>;
};
&sdhc_2 {
vdd-supply = <&pm8150_1_l17>;
qcom,vdd-voltage-level = <2950000 2960000>;
qcom,vdd-current-level = <200 800000>;
vdd-io-supply = <&pm8150_2_l13>;
qcom,vdd-io-voltage-level = <1808000 2960000>;
qcom,vdd-io-current-level = <200 22000>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_on>;
pinctrl-1 = <&sdc2_off>;
cd-gpios = <&pm8150_1_gpios 4 GPIO_ACTIVE_LOW>;
status = "ok"
};
&qupv3_se12_2uart {
status = "ok"
};