mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-24 21:54:34 -04:00
8c9d54bc96
Add audio related dtsi files for yupik. Change-Id: I65bff7b78f8a0e25c790df7cd888097f387c6d9e
2344 lines
42 KiB
Devicetree
2344 lines
42 KiB
Devicetree
&soc {
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tlmm: pinctrl@f000000 {
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compatible = "qcom,yupik-pinctrl";
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reg = <0xf000000 0x1000000>;
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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wakeup-parent = <&pdc>;
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qupv3_se0_i2c_pins: qupv3_se0_i2c_pins {
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qupv3_se0_i2c_active: qupv3_se0_i2c_active {
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mux {
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pins = "gpio0", "gpio1";
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function = "qup00";
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};
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config {
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pins = "gpio0", "gpio1";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep {
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mux {
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pins = "gpio0", "gpio1";
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function = "gpio";
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};
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config {
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pins = "gpio0", "gpio1";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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sdc1_on: sdc1_on {
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clk {
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pins = "sdc1_clk";
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bias-disable;
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drive-strength = <16>;
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};
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cmd {
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pins = "sdc1_cmd";
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bias-pull-up;
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drive-strength = <10>;
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};
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data {
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pins = "sdc1_data";
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bias-pull-up;
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drive-strength = <10>;
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};
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rclk {
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pins = "sdc1_rclk";
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bias-pull-down;
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};
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};
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sdc1_off: sdc1_off {
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clk {
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pins = "sdc1_clk";
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bias-disable;
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drive-strength = <2>;
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};
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cmd {
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pins = "sdc1_cmd";
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bias-pull-up;
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drive-strength = <2>;
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};
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data {
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pins = "sdc1_data";
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bias-pull-up;
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drive-strength = <2>;
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};
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rclk {
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pins = "sdc1_rclk";
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bias-pull-down;
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};
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};
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sdc2_on: sdc2_on {
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clk {
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pins = "sdc2_clk";
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bias-disable;
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drive-strength = <16>;
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};
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cmd {
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pins = "sdc2_cmd";
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bias-pull-up;
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drive-strength = <10>;
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};
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data {
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pins = "sdc2_data";
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bias-pull-up;
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drive-strength = <10>;
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};
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sd-cd {
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pins = "gpio91";
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bias-pull-up;
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drive-strength = <2>;
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};
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};
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sdc2_off: sdc2_off {
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clk {
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pins = "sdc2_clk";
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bias-disable;
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drive-strength = <2>;
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};
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cmd {
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pins = "sdc2_cmd";
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bias-pull-up;
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drive-strength = <2>;
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};
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data {
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pins = "sdc2_data";
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bias-pull-up;
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drive-strength = <2>;
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};
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sd-cd {
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pins = "gpio91";
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bias-disable;
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drive-strength = <2>;
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};
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};
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qupv3_se0_spi_pins: qupv3_se0_spi_pins {
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qupv3_se0_spi_active: qupv3_se0_spi_active {
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mux {
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pins = "gpio0", "gpio1",
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"gpio2", "gpio3";
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function = "qup00";
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};
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config {
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pins = "gpio0", "gpio1",
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"gpio2", "gpio3";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
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mux {
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pins = "gpio0", "gpio1",
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"gpio2", "gpio3";
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function = "gpio";
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};
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config {
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pins = "gpio0", "gpio1",
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"gpio2", "gpio3";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se1_i2c_pins: qupv3_se1_i2c_pins {
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qupv3_se1_i2c_active: qupv3_se1_i2c_active {
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mux {
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pins = "gpio4", "gpio5";
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function = "qup01";
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};
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config {
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pins = "gpio4", "gpio5";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep {
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mux {
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pins = "gpio4", "gpio5";
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function = "gpio";
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};
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config {
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pins = "gpio4", "gpio5";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se1_spi_pins: qupv3_se1_spi_pins {
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qupv3_se1_spi_active: qupv3_se1_spi_active {
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mux {
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pins = "gpio4", "gpio5",
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"gpio6", "gpio7";
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function = "qup01";
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};
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config {
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pins = "gpio4", "gpio5",
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"gpio6", "gpio7";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se1_spi_sleep: qupv3_se1_spi_sleep {
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mux {
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pins = "gpio4", "gpio5",
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"gpio6", "gpio7";
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function = "gpio";
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};
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config {
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pins = "gpio4", "gpio5",
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"gpio6", "gpio7";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se2_i2c_pins: qupv3_se2_i2c_pins {
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qupv3_se2_i2c_active: qupv3_se2_i2c_active {
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mux {
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pins = "gpio8", "gpio9";
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function = "qup02";
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};
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config {
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pins = "gpio8", "gpio9";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep {
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mux {
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pins = "gpio8", "gpio9";
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function = "gpio";
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};
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config {
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pins = "gpio8", "gpio9";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se2_spi_pins: qupv3_se2_spi_pins {
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qupv3_se2_spi_active: qupv3_se2_spi_active {
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mux {
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pins = "gpio8", "gpio9",
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"gpio10", "gpio11";
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function = "qup02";
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};
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config {
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pins = "gpio8", "gpio9",
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"gpio10", "gpio11";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se2_spi_sleep: qupv3_se2_spi_sleep {
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mux {
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pins = "gpio8", "gpio9",
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"gpio10", "gpio11";
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function = "gpio";
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};
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config {
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pins = "gpio8", "gpio9",
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"gpio10", "gpio11";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se3_i2c_pins: qupv3_se3_i2c_pins {
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qupv3_se3_i2c_active: qupv3_se3_i2c_active {
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mux {
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pins = "gpio12", "gpio13";
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function = "qup03";
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};
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config {
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pins = "gpio12", "gpio13";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep {
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mux {
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pins = "gpio12", "gpio13";
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function = "gpio";
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};
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config {
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pins = "gpio12", "gpio13";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se3_spi_pins: qupv3_se3_spi_pins {
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qupv3_se3_spi_active: qupv3_se3_spi_active {
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mux {
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pins = "gpio12", "gpio13",
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"gpio14", "gpio15";
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function = "qup03";
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};
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config {
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pins = "gpio12", "gpio13",
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"gpio14", "gpio15";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se3_spi_sleep: qupv3_se3_spi_sleep {
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mux {
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pins = "gpio12", "gpio13",
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"gpio14", "gpio15";
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function = "gpio";
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};
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config {
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pins = "gpio12", "gpio13",
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"gpio14", "gpio15";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se4_i2c_pins: qupv3_se4_i2c_pins {
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qupv3_se4_i2c_active: qupv3_se4_i2c_active {
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mux {
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pins = "gpio16", "gpio17";
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function = "qup04";
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};
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config {
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pins = "gpio16", "gpio17";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep {
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mux {
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pins = "gpio16", "gpio17";
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function = "gpio";
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};
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config {
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pins = "gpio16", "gpio17";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se4_spi_pins: qupv3_se4_spi_pins {
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qupv3_se4_spi_active: qupv3_se4_spi_active {
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mux {
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pins = "gpio16", "gpio17",
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"gpio18", "gpio19";
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function = "qup04";
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};
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config {
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pins = "gpio16", "gpio17",
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"gpio18", "gpio19";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se4_spi_sleep: qupv3_se4_spi_sleep {
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mux {
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pins = "gpio16", "gpio17",
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"gpio18", "gpio19";
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function = "gpio";
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};
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config {
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pins = "gpio16", "gpio17",
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"gpio18", "gpio19";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se5_2uart_pins: qupv3_se5_2uart_pins {
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qupv3_se5_2uart_active: qupv3_se5_2uart_active {
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mux {
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pins = "gpio22", "gpio23";
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function = "qup05";
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};
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config {
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pins = "gpio22", "gpio23";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se5_2uart_sleep: qupv3_se5_2uart_sleep {
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mux {
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pins = "gpio22", "gpio23";
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function = "gpio";
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};
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config {
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pins = "gpio22", "gpio23";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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};
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qupv3_se6_i2c_pins: qupv3_se6_i2c_pins {
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qupv3_se6_i2c_active: qupv3_se6_i2c_active {
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mux {
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pins = "gpio24", "gpio25";
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function = "qup06";
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};
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config {
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pins = "gpio24", "gpio25";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep {
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mux {
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pins = "gpio24", "gpio25";
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function = "gpio";
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};
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config {
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pins = "gpio24", "gpio25";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se6_spi_pins: qupv3_se6_spi_pins {
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qupv3_se6_spi_active: qupv3_se6_spi_active {
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mux {
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pins = "gpio24", "gpio25",
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"gpio26", "gpio27";
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function = "qup06";
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};
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config {
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pins = "gpio24", "gpio25",
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"gpio26", "gpio27";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se6_spi_sleep: qupv3_se6_spi_sleep {
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mux {
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pins = "gpio24", "gpio25",
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"gpio26", "gpio27";
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function = "gpio";
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};
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config {
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pins = "gpio24", "gpio25",
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"gpio26", "gpio27";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se7_4uart_pins: qupv3_se7_4uart_pins {
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qupv3_se7_default_cts:
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qupv3_se7_default_cts {
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mux {
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pins = "gpio28";
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function = "gpio";
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};
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config {
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pins = "gpio28";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se7_default_rtsrx:
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qupv3_se7_default_rtsrx {
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mux {
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pins = "gpio29", "gpio31";
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function = "gpio";
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};
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config {
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pins = "gpio29", "gpio31";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se7_default_tx:
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qupv3_se7_default_tx {
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mux {
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pins = "gpio30";
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function = "gpio";
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};
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config {
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pins = "gpio30";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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|
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qupv3_se7_ctsrx: qupv3_se7_ctsrx {
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mux {
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pins = "gpio28", "gpio31";
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function = "qup07";
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};
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config {
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pins = "gpio28", "gpio31";
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drive-strength = <2>;
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bias-disable;
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};
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};
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|
|
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qupv3_se7_rts: qupv3_se7_rts {
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mux {
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pins = "gpio29";
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function = "qup07";
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};
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config {
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pins = "gpio29";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se7_tx: qupv3_se7_tx {
|
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mux {
|
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pins = "gpio30";
|
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function = "qup07";
|
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};
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|
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config {
|
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pins = "gpio30";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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|
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qupv3_se8_i2c_pins: qupv3_se8_i2c_pins {
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qupv3_se8_i2c_active: qupv3_se8_i2c_active {
|
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mux {
|
|
pins = "gpio32", "gpio33";
|
|
function = "qup10";
|
|
};
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|
|
|
config {
|
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pins = "gpio32", "gpio33";
|
|
drive-strength = <2>;
|
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bias-pull-up;
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};
|
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};
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|
|
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qupv3_se8_i2c_sleep: qupv3_se8_i2c_sleep {
|
|
mux {
|
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pins = "gpio32", "gpio33";
|
|
function = "gpio";
|
|
};
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|
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config {
|
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pins = "gpio32", "gpio33";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_pins: qupv3_se8_spi_pins {
|
|
qupv3_se8_spi_active: qupv3_se8_spi_active {
|
|
mux {
|
|
pins = "gpio32", "gpio33",
|
|
"gpio34", "gpio35";
|
|
function = "qup10";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32", "gpio33",
|
|
"gpio34", "gpio35";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_sleep: qupv3_se8_spi_sleep {
|
|
mux {
|
|
pins = "gpio32", "gpio33",
|
|
"gpio34", "gpio35";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32", "gpio33",
|
|
"gpio34", "gpio35";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se9_i2c_pins: qupv3_se9_i2c_pins {
|
|
qupv3_se9_i2c_active: qupv3_se9_i2c_active {
|
|
mux {
|
|
pins = "gpio36", "gpio37";
|
|
function = "qup11";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36", "gpio37";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_i2c_sleep: qupv3_se9_i2c_sleep {
|
|
mux {
|
|
pins = "gpio36", "gpio37";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36", "gpio37";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se9_spi_pins: qupv3_se9_spi_pins {
|
|
qupv3_se9_spi_active: qupv3_se9_spi_active {
|
|
mux {
|
|
pins = "gpio36", "gpio37",
|
|
"gpio38", "gpio39";
|
|
function = "qup11";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36", "gpio37",
|
|
"gpio38", "gpio39";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_spi_sleep: qupv3_se9_spi_sleep {
|
|
mux {
|
|
pins = "gpio36", "gpio37",
|
|
"gpio38", "gpio39";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36", "gpio37",
|
|
"gpio38", "gpio39";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se10_i2c_pins: qupv3_se10_i2c_pins {
|
|
qupv3_se10_i2c_active: qupv3_se10_i2c_active {
|
|
mux {
|
|
pins = "gpio40", "gpio41";
|
|
function = "qup12";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40", "gpio41";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_i2c_sleep: qupv3_se10_i2c_sleep {
|
|
mux {
|
|
pins = "gpio40", "gpio41";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40", "gpio41";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se10_spi_pins: qupv3_se10_spi_pins {
|
|
qupv3_se10_spi_active: qupv3_se10_spi_active {
|
|
mux {
|
|
pins = "gpio40", "gpio41",
|
|
"gpio42", "gpio43";
|
|
function = "qup12";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40", "gpio41",
|
|
"gpio42", "gpio43";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_spi_sleep: qupv3_se10_spi_sleep {
|
|
mux {
|
|
pins = "gpio40", "gpio41",
|
|
"gpio42", "gpio43";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40", "gpio41",
|
|
"gpio42", "gpio43";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se10_2uart_pins: qupv3_se10_2uart_pins {
|
|
qupv3_se10_default_txrx: qupv3_se10_default_txrx {
|
|
mux {
|
|
pins = "gpio42", "gpio43";
|
|
function = "qup12";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio42", "gpio43";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_2uart_active: qupv3_se6_2uart_active {
|
|
mux {
|
|
pins = "gpio42", "gpio43";
|
|
function = "qup12";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio42", "gpio43";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_2uart_sleep: qupv3_se10_2uart_sleep {
|
|
mux {
|
|
pins = "gpio42", "gpio43";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio42", "gpio31";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se11_i2c_pins: qupv3_se11_i2c_pins {
|
|
qupv3_se11_i2c_active: qupv3_se11_i2c_active {
|
|
mux {
|
|
pins = "gpio44", "gpio45";
|
|
function = "qup13";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44", "gpio45";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_i2c_sleep: qupv3_se11_i2c_sleep {
|
|
mux {
|
|
pins = "gpio44", "gpio45";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44", "gpio45";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se11_spi_pins: qupv3_se11_spi_pins {
|
|
qupv3_se11_spi_active: qupv3_se11_spi_active {
|
|
mux {
|
|
pins = "gpio44", "gpio45",
|
|
"gpio46", "gpio47";
|
|
function = "qup13";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44", "gpio45",
|
|
"gpio46", "gpio47";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_spi_sleep: qupv3_se11_spi_sleep {
|
|
mux {
|
|
pins = "gpio44", "gpio45",
|
|
"gpio46", "gpio47";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44", "gpio45",
|
|
"gpio46", "gpio47";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se12_i2c_pins: qupv3_se12_i2c_pins {
|
|
qupv3_se12_i2c_active: qupv3_se12_i2c_active {
|
|
mux {
|
|
pins = "gpio48", "gpio49";
|
|
function = "qup14";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48", "gpio49";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_i2c_sleep: qupv3_se12_i2c_sleep {
|
|
mux {
|
|
pins = "gpio48", "gpio49";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48", "gpio49";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se12_spi_pins: qupv3_se12_spi_pins {
|
|
qupv3_se12_spi_active: qupv3_se12_spi_active {
|
|
mux {
|
|
pins = "gpio48", "gpio49",
|
|
"gpio50", "gpio51";
|
|
function = "qup14";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48", "gpio49",
|
|
"gpio50", "gpio51";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_spi_sleep: qupv3_se12_spi_sleep {
|
|
mux {
|
|
pins = "gpio48", "gpio49",
|
|
"gpio50", "gpio51";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48", "gpio49",
|
|
"gpio50", "gpio51";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se13_i2c_pins: qupv3_se13_i2c_pins {
|
|
qupv3_se13_i2c_active: qupv3_se13_i2c_active {
|
|
mux {
|
|
pins = "gpio52", "gpio53";
|
|
function = "qup15";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52", "gpio53";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_i2c_sleep: qupv3_se13_i2c_sleep {
|
|
mux {
|
|
pins = "gpio52", "gpio53";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52", "gpio53";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se13_spi_pins: qupv3_se13_spi_pins {
|
|
qupv3_se13_spi_active: qupv3_se13_spi_active {
|
|
mux {
|
|
pins = "gpio52", "gpio53",
|
|
"gpio54", "gpio55";
|
|
function = "qup15";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52", "gpio53",
|
|
"gpio54", "gpio55";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_spi_sleep: qupv3_se13_spi_sleep {
|
|
mux {
|
|
pins = "gpio52", "gpio53",
|
|
"gpio54", "gpio55";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52", "gpio53",
|
|
"gpio54", "gpio55";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se14_i2c_pins: qupv3_se14_i2c_pins {
|
|
qupv3_se14_i2c_active: qupv3_se14_i2c_active {
|
|
mux {
|
|
pins = "gpio56", "gpio57";
|
|
function = "qup16";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio56", "gpio57";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se14_i2c_sleep: qupv3_se14_i2c_sleep {
|
|
mux {
|
|
pins = "gpio56", "gpio57";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio56", "gpio57";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se14_spi_pins: qupv3_se14_spi_pins {
|
|
qupv3_se14_spi_active: qupv3_se14_spi_active {
|
|
mux {
|
|
pins = "gpio56", "gpio57",
|
|
"gpio58", "gpio59";
|
|
function = "qup16";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio56", "gpio57",
|
|
"gpio58", "gpio59";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se14_spi_sleep: qupv3_se14_spi_sleep {
|
|
mux {
|
|
pins = "gpio56", "gpio57",
|
|
"gpio58", "gpio59";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio56", "gpio57",
|
|
"gpio58", "gpio59";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se14_2uart_pins: qupv3_se14_2uart_pins {
|
|
qupv3_se14_default_txrx: qupv3_se14_default_txrx {
|
|
mux {
|
|
pins = "gpio58", "gpio59";
|
|
function = "qup16";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio58", "gpio59";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se14_2uart_active: qupv3_se14_2uart_active {
|
|
mux {
|
|
pins = "gpio58", "gpio59";
|
|
function = "qup16";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio58", "gpio59";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se14_2uart_sleep: qupv3_se14_2uart_sleep {
|
|
mux {
|
|
pins = "gpio58", "gpio59";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio58", "gpio59";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se15_i2c_pins: qupv3_se15_i2c_pins {
|
|
qupv3_se15_i2c_active: qupv3_se15_i2c_active {
|
|
mux {
|
|
pins = "gpio60", "gpio61";
|
|
function = "qup17";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio60", "gpio61";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se15_i2c_sleep: qupv3_se15_i2c_sleep {
|
|
mux {
|
|
pins = "gpio60", "gpio61";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio60", "gpio61";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se15_spi_pins: qupv3_se15_spi_pins {
|
|
qupv3_se15_spi_active: qupv3_se15_spi_active {
|
|
mux {
|
|
pins = "gpio60", "gpio61",
|
|
"gpio62", "gpio63";
|
|
function = "qup17";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio60", "gpio61",
|
|
"gpio62", "gpio63";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se15_spi_sleep: qupv3_se15_spi_sleep {
|
|
mux {
|
|
pins = "gpio60", "gpio61",
|
|
"gpio62", "gpio63";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio60", "gpio61",
|
|
"gpio62", "gpio63";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
/* WSA speaker reset pins */
|
|
spkr_1_sd_n {
|
|
spkr_1_sd_n_sleep: spkr_1_sd_n_sleep {
|
|
mux {
|
|
pins = "gpio63";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio63";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
spkr_1_sd_n_active: spkr_1_sd_n_active {
|
|
mux {
|
|
pins = "gpio63";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio63";
|
|
drive-strength = <16>; /* 16 mA */
|
|
bias-disable;
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
spkr_2_sd_n {
|
|
spkr_2_sd_n_sleep: spkr_2_sd_n_sleep {
|
|
mux {
|
|
pins = "gpio62";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio62";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
spkr_2_sd_n_active: spkr_2_sd_n_active {
|
|
mux {
|
|
pins = "gpio62";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio62";
|
|
drive-strength = <16>; /* 16 mA */
|
|
bias-disable;
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
/* WCD reset pin */
|
|
wcd93xx_reset_active: wcd93xx_reset_active {
|
|
mux {
|
|
pins = "gpio83";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio83";
|
|
drive-strength = <16>;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
wcd93xx_reset_sleep: wcd93xx_reset_sleep {
|
|
mux {
|
|
pins = "gpio83";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio83";
|
|
drive-strength = <16>;
|
|
bias-disable;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_clk {
|
|
pri_aux_pcm_clk_sleep: pri_aux_pcm_clk_sleep {
|
|
mux {
|
|
pins = "gpio97";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio97";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_clk_active: pri_aux_pcm_clk_active {
|
|
mux {
|
|
pins = "gpio97";
|
|
function = "mi2s0_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio97";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_sync {
|
|
pri_aux_pcm_sync_sleep: pri_aux_pcm_sync_sleep {
|
|
mux {
|
|
pins = "gpio100";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio100";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_sync_active: pri_aux_pcm_sync_active {
|
|
mux {
|
|
pins = "gpio100";
|
|
function = "mi2s0_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio100";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_din {
|
|
pri_aux_pcm_din_sleep: pri_aux_pcm_din_sleep {
|
|
mux {
|
|
pins = "gpio98";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio98";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_din_active: pri_aux_pcm_din_active {
|
|
mux {
|
|
pins = "gpio98";
|
|
function = "mi2s0_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio98";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_dout {
|
|
pri_aux_pcm_dout_sleep: pri_aux_pcm_dout_sleep {
|
|
mux {
|
|
pins = "gpio99";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio99";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_dout_active: pri_aux_pcm_dout_active {
|
|
mux {
|
|
pins = "gpio99";
|
|
function = "mi2s0_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio99";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_aux_pcm {
|
|
sec_aux_pcm_clk_sleep: sec_aux_pcm_clk_sleep {
|
|
mux {
|
|
pins = "gpio106";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio106";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_aux_pcm_clk_active: sec_aux_pcm_clk_active {
|
|
mux {
|
|
pins = "gpio106";
|
|
function = "mi2s1_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio106";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
|
|
sec_aux_pcm_ws_sleep: sec_aux_pcm_ws_sleep {
|
|
mux {
|
|
pins = "gpio108";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio108";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_aux_pcm_ws_active: sec_aux_pcm_ws_active {
|
|
mux {
|
|
pins = "gpio108";
|
|
function = "mi2s1_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio108";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_aux_pcm_din {
|
|
sec_aux_pcm_din_sleep: sec_aux_pcm_din_sleep {
|
|
mux {
|
|
pins = "gpio107";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio107";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_aux_pcm_din_active: sec_aux_pcm_din_active {
|
|
mux {
|
|
pins = "gpio107";
|
|
function = "mi2s1_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio107";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_aux_pcm_dout {
|
|
sec_aux_pcm_dout_sleep: sec_aux_pcm_dout_sleep {
|
|
mux {
|
|
pins = "gpio105";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio105";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_aux_pcm_dout_active: sec_aux_pcm_dout_active {
|
|
mux {
|
|
pins = "gpio105";
|
|
function = "mi2s1_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio105";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm {
|
|
tert_aux_pcm_clk_sleep: tert_aux_pcm_clk_sleep {
|
|
mux {
|
|
pins = "gpio101";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio101";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm_clk_active: tert_aux_pcm_clk_active {
|
|
mux {
|
|
pins = "gpio101";
|
|
function = "mi2s2_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio101";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm_ws_sleep: tert_aux_pcm_ws_sleep {
|
|
mux {
|
|
pins = "gpio103";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio103";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm_ws_active: tert_aux_pcm_ws_active {
|
|
mux {
|
|
pins = "gpio103";
|
|
function = "mi2s2_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio103";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm_din {
|
|
tert_aux_pcm_din_sleep: tert_aux_pcm_din_sleep {
|
|
mux {
|
|
pins = "gpio102";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio102";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm_din_active: tert_aux_pcm_din_active {
|
|
mux {
|
|
pins = "gpio102";
|
|
function = "mi2s2_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio102";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm_dout {
|
|
tert_aux_pcm_dout_sleep: tert_aux_pcm_dout_sleep {
|
|
mux {
|
|
pins = "gpio104";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio104";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm_dout_active: tert_aux_pcm_dout_active {
|
|
mux {
|
|
pins = "gpio104";
|
|
function = "mi2s2_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio104";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_tdm_clk {
|
|
pri_tdm_clk_sleep: pri_tdm_clk_sleep {
|
|
mux {
|
|
pins = "gpio97";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio97";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_tdm_clk_active: pri_tdm_clk_active {
|
|
mux {
|
|
pins = "gpio97";
|
|
function = "mi2s0_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio97";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_tdm_sync {
|
|
pri_tdm_sync_sleep: pri_tdm_sync_sleep {
|
|
mux {
|
|
pins = "gpio100";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio100";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_tdm_sync_active: pri_tdm_sync_active {
|
|
mux {
|
|
pins = "gpio100";
|
|
function = "mi2s0_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio100";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_tdm_din {
|
|
pri_tdm_din_sleep: pri_tdm_din_sleep {
|
|
mux {
|
|
pins = "gpio98";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio98";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_tdm_din_active: pri_tdm_din_active {
|
|
mux {
|
|
pins = "gpio98";
|
|
function = "mi2s0_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio98";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_tdm_dout {
|
|
pri_tdm_dout_sleep: pri_tdm_dout_sleep {
|
|
mux {
|
|
pins = "gpio99";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio99";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_tdm_dout_active: pri_tdm_dout_active {
|
|
mux {
|
|
pins = "gpio99";
|
|
function = "mi2s0_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio99";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_tdm {
|
|
sec_tdm_sck_sleep: sec_tdm_sck_sleep {
|
|
mux {
|
|
pins = "gpio106";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio106";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_tdm_sck_active: sec_tdm_sck_active {
|
|
mux {
|
|
pins = "gpio106";
|
|
function = "mi2s1_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio106";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
|
|
sec_tdm_ws_sleep: sec_tdm_ws_sleep {
|
|
mux {
|
|
pins = "gpio108";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio108";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_tdm_ws_active: sec_tdm_ws_active {
|
|
mux {
|
|
pins = "gpio108";
|
|
function = "mi2s1_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio108";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_tdm_din {
|
|
sec_tdm_din_sleep: sec_tdm_din_sleep {
|
|
mux {
|
|
pins = "gpio107";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio107";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_tdm_din_active: sec_tdm_din_active {
|
|
mux {
|
|
pins = "gpio107";
|
|
function = "mi2s1_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio107";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_tdm_dout {
|
|
sec_tdm_dout_sleep: sec_tdm_dout_sleep {
|
|
mux {
|
|
pins = "gpio105";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio105";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_tdm_dout_active: sec_tdm_dout_active {
|
|
mux {
|
|
pins = "gpio105";
|
|
function = "mi2s1_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio105";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_tdm {
|
|
tert_tdm_clk_sleep: tert_tdm_clk_sleep {
|
|
mux {
|
|
pins = "gpio101";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio101";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_tdm_clk_active: tert_tdm_clk_active {
|
|
mux {
|
|
pins = "gpio101";
|
|
function = "mi2s2_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio101";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
tert_tdm_ws_sleep: tert_tdm_ws_sleep {
|
|
mux {
|
|
pins = "gpio103";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio103";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_tdm_ws_active: tert_tdm_ws_active {
|
|
mux {
|
|
pins = "gpio103";
|
|
function = "mi2s2_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio103";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_tdm_din {
|
|
tert_tdm_din_sleep: tert_tdm_din_sleep {
|
|
mux {
|
|
pins = "gpio102";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio102";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_tdm_din_active: tert_tdm_din_active {
|
|
mux {
|
|
pins = "gpio102";
|
|
function = "mi2s2_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio102";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_tdm_dout {
|
|
tert_tdm_dout_sleep: tert_tdm_dout_sleep {
|
|
mux {
|
|
pins = "gpio104";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio104";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_tdm_dout_active: tert_tdm_dout_active {
|
|
mux {
|
|
pins = "gpio104";
|
|
function = "mi2s2_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio104";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_mi2s_mclk {
|
|
pri_mi2s_mclk_sleep: pri_mi2s_mclk_sleep {
|
|
mux {
|
|
pins = "gpio96";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio96";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_mi2s_mclk_active: pri_mi2s_mclk_active {
|
|
mux {
|
|
pins = "gpio96";
|
|
function = "pri_mi2s";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio96";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_mi2s_sck {
|
|
pri_mi2s_sck_sleep: pri_mi2s_sck_sleep {
|
|
mux {
|
|
pins = "gpio97";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio97";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_mi2s_sck_active: pri_mi2s_sck_active {
|
|
mux {
|
|
pins = "gpio97";
|
|
function = "mi2s0_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio97";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_mi2s_ws {
|
|
pri_mi2s_ws_sleep: pri_mi2s_ws_sleep {
|
|
mux {
|
|
pins = "gpio100";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio100";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_mi2s_ws_active: pri_mi2s_ws_active {
|
|
mux {
|
|
pins = "gpio100";
|
|
function = "mi2s0_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio100";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_mi2s_sd0 {
|
|
pri_mi2s_sd0_sleep: pri_mi2s_sd0_sleep {
|
|
mux {
|
|
pins = "gpio98";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio98";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_mi2s_sd0_active: pri_mi2s_sd0_active {
|
|
mux {
|
|
pins = "gpio98";
|
|
function = "mi2s0_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio98";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_mi2s_sd1 {
|
|
pri_mi2s_sd1_sleep: pri_mi2s_sd1_sleep {
|
|
mux {
|
|
pins = "gpio99";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio99";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_mi2s_sd1_active: pri_mi2s_sd1_active {
|
|
mux {
|
|
pins = "gpio99";
|
|
function = "mi2s0_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio99";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_mi2s_mclk {
|
|
sec_mi2s_mclk_sleep: sec_mi2s_mclk_sleep {
|
|
mux {
|
|
pins = "gpio105";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio105";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_mi2s_mclk_active: sec_mi2s_mclk_active {
|
|
mux {
|
|
pins = "gpio105";
|
|
function = "sec_mi2s";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio105";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_mi2s_sck {
|
|
sec_mi2s_sck_sleep: sec_mi2s_sck_sleep {
|
|
mux {
|
|
pins = "gpio106";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio106";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_mi2s_sck_active: sec_mi2s_sck_active {
|
|
mux {
|
|
pins = "gpio106";
|
|
function = "mi2s1_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio106";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_mi2s_ws {
|
|
sec_mi2s_ws_sleep: sec_mi2s_ws_sleep {
|
|
mux {
|
|
pins = "gpio108";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio108";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_mi2s_ws_active: sec_mi2s_ws_active {
|
|
mux {
|
|
pins = "gpio108";
|
|
function = "mi2s1_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio108";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_mi2s_sd0 {
|
|
sec_mi2s_sd0_sleep: sec_mi2s_sd0_sleep {
|
|
mux {
|
|
pins = "gpio107";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio107";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_mi2s_sd0_active: sec_mi2s_sd0_active {
|
|
mux {
|
|
pins = "gpio107";
|
|
function = "mi2s1_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio107";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_mi2s_sd1 {
|
|
sec_mi2s_sd1_sleep: sec_mi2s_sd1_sleep {
|
|
mux {
|
|
pins = "gpio105";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio105";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_mi2s_sd1_active: sec_mi2s_sd1_active {
|
|
mux {
|
|
pins = "gpio105";
|
|
function = "mi2s1_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio105";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_mi2s_sck {
|
|
tert_mi2s_sck_sleep: tert_mi2s_sck_sleep {
|
|
mux {
|
|
pins = "gpio101";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio101";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_mi2s_sck_active: tert_mi2s_sck_active {
|
|
mux {
|
|
pins = "gpio101";
|
|
function = "mi2s2_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio101";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_mi2s_ws {
|
|
tert_mi2s_ws_sleep: tert_mi2s_ws_sleep {
|
|
mux {
|
|
pins = "gpio103";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio103";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_mi2s_ws_active: tert_mi2s_ws_active {
|
|
mux {
|
|
pins = "gpio103";
|
|
function = "mi2s2_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio103";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_mi2s_sd0 {
|
|
tert_mi2s_sd0_sleep: tert_mi2s_sd0_sleep {
|
|
mux {
|
|
pins = "gpio102";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio102";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_mi2s_sd0_active: tert_mi2s_sd0_active {
|
|
mux {
|
|
pins = "gpio102";
|
|
function = "mi2s2_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio102";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_mi2s_sd1 {
|
|
tert_mi2s_sd1_sleep: tert_mi2s_sd1_sleep {
|
|
mux {
|
|
pins = "gpio104";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio104";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_mi2s_sd1_active: tert_mi2s_sd1_active {
|
|
mux {
|
|
pins = "gpio104";
|
|
function = "mi2s2_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio104";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|