Repository files (latest commit first)

Filename	Latest commit message	Latest commit date
Chris Wilson 0f0cd47206 drm/i915: Only spin whilst waiting on the current request ... Limit busywaiting only to the request currently being processed by the GPU. If the request is not currently being processed by the GPU, there is a very low likelihood of it being completed within the 2 microsecond spin timeout and so we will just be wasting CPU cycles. v2: Check for logical inversion when rebasing - we were incorrectly checking for this request being active, and instead busywaiting for when the GPU was not yet processing the request of interest. v3: Try another colour for the seqno names. v4: Another colour for the function names. v5: Remove the forced coherency when checking for the active request. On reflection and plenty of recent experimentation, the issue is not a cache coherency problem - but an irq/seqno ordering problem (timing issue). Here, we do not need the w/a to force ordering of the read with an interrupt. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: "Rogozhkin, Dmitry V" <dmitry.v.rogozhkin@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: Eero Tamminen <eero.t.tamminen@intel.com> Cc: "Rantala, Valtteri" <valtteri.rantala@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1449833608-22125-4-git-send-email-chris@chris-wilson.co.uk (cherry picked from commit 821485dc2a) Signed-off-by: Jani Nikula <jani.nikula@intel.com>		2015-12-22 12:56:58 +02:00
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drm	drm/i915: Only spin whilst waiting on the current request	2015-12-22 12:56:58 +02:00
host1x
ipu-v3	gpu: ipu-v3: Assign of_node of child platform devices to corresponding ports	2015-11-24 11:30:17 +01:00
vga	vgaarb: fix signal handling in vga_get()	2015-12-11 14:04:44 +10:00
Makefile