Kever Yang
19ce828cbc
clk: rockchip: add clock ID for usbphy480m_src ...
There are 3 different parent clock from different usbphy,
all of them are fixed 480MHz, it is not able to auto select
by clock core to the 2nd and the 3rd parent.
For different use case for different board, we may need to
select different usbphy clock out as parent manually.
Add the clock ID for it so that we can use in dts.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-01-12 21:38:08 +01:00
dt: bindings: ux500: Add header for PM domains specifiers
2014-10-28 10:47:57 +01:00
Merge branch 'for-v3.16/ti-clk-drv' of github.com:t-kristo/linux-pm into clk-next
2014-06-10 16:53:25 -07:00
clk: rockchip: add clock ID for usbphy480m_src
2015-01-12 21:38:08 +01:00
dmaengine: at_xdmac: creation of the atmel eXtended DMA Controller driver
2014-11-06 11:00:08 +05:30
Input: drv260x - add TI drv260x haptics driver
2014-08-19 22:19:28 -07:00
of: Add binding document for MIPS GIC
2014-11-24 07:45:30 +01:00
memory: Add NVIDIA Tegra memory controller support
2014-12-04 16:11:47 +01:00
== Changes to existing drivers ==
2014-08-07 17:17:39 -07:00
phy: add support for USB cluster on the Armada 375 SoC
2014-11-26 11:07:14 +05:30
Pin control changes for the v3.19 series:
2014-12-11 10:43:14 -08:00
regulator: max77802: Add header for operating modes
2014-10-20 12:23:50 +01:00
clk: qcom: Add support for APQ8064 multimedia clocks
2014-07-15 16:39:03 -07:00
reset: stih407: Add reset controllers DT bindings
2014-10-31 09:47:54 +01:00
ASoC: cs35l32: Add support for CS35L32 Boosted Amplifier
2014-08-16 17:03:22 -05:00
of: Add bindings for nvidia,tegra124-soctherm
2014-11-20 10:43:17 -04:00
19ce828cbc