android_kernel_motorola_sm6375/drivers/perf
Repository files (latest commit first)
Filename Latest commit message Latest commit date
Shaokun Zhang a981328268 drivers/perf: hisi: Fix wrong value for all counters enable
[ Upstream commit 961abd78adcb4c72c343fcd9f9dc5e2ebbe9b448 ]

In L3C uncore PMU drivers, bit16 is used to control all counters enable &
disable. Wrong value is given in the driver and its default value is 1'b1,
it can work because each PMU counter has its own control bits too.
Let's fix the wrong value.

Fixes: 2940bc4333 ("perf: hisi: Add support for HiSilicon SoC L3C PMU driver")
Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/1591350221-32275-1-git-send-email-zhangshaokun@hisilicon.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-24 17:50:41 +02:00
..
hisilicon drivers/perf: hisi: Fix wrong value for all counters enable 2020-06-24 17:50:41 +02:00
arm-cci.c
arm-ccn.c
arm_dsu_pmu.c
arm_pmu.c
arm_pmu_acpi.c drivers/perf: arm_pmu_acpi: Fix incorrect checking of gicc pointer 2020-03-25 08:25:47 +01:00
arm_pmu_platform.c
arm_smmuv3_pmu.c pmu/smmuv3: Clear IRQ affinity hint on device removal 2020-06-22 09:30:54 +02:00
arm_spe_pmu.c
fsl_imx8_ddr_perf.c drivers/perf: fsl_imx8_ddr: Correct the CLEAR bit definition 2020-03-25 08:25:47 +01:00
Kconfig
Makefile
qcom_l2_pmu.c
qcom_l3_pmu.c
thunderx2_pmu.c
xgene_pmu.c