mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-26 06:33:19 -04:00
84cc94906c
Add aop_send_message debugfs interface for clients to send data to the AOP. Change-Id: If6009095849650c0f189e652564363bc1062fdb0
529 lines
11 KiB
Devicetree
529 lines
11 KiB
Devicetree
#include <dt-bindings/gpio/gpio.h>
|
|
|
|
/* Remove regulator nodes specific to SM8150 */
|
|
&apps_rsc {
|
|
/delete-node/ regulator-pm8150-s4;
|
|
/delete-node/ rpmh-regulator-msslvl;
|
|
/delete-node/ rpmh-regulator-smpa2;
|
|
/delete-node/ rpmh-regulator-ebilvl;
|
|
/delete-node/ rpmh-regulator-smpa5;
|
|
/delete-node/ rpmh-regulator-smpa6;
|
|
/delete-node/ rpmh-regulator-ldoa1;
|
|
/delete-node/ rpmh-regulator-ldoa2;
|
|
/delete-node/ rpmh-regulator-ldoa3;
|
|
/delete-node/ rpmh-regulator-lmxlvl;
|
|
/delete-node/ rpmh-regulator-ldoa5;
|
|
/delete-node/ rpmh-regulator-ldoa6;
|
|
/delete-node/ rpmh-regulator-ldoa7;
|
|
/delete-node/ rpmh-regulator-lcxlvl;
|
|
/delete-node/ rpmh-regulator-ldoa9;
|
|
/delete-node/ rpmh-regulator-ldoa10;
|
|
/delete-node/ rpmh-regulator-ldoa11;
|
|
/delete-node/ rpmh-regulator-ldoa12;
|
|
/delete-node/ rpmh-regulator-ldoa13;
|
|
/delete-node/ rpmh-regulator-ldoa14;
|
|
/delete-node/ rpmh-regulator-ldoa15;
|
|
/delete-node/ rpmh-regulator-ldoa16;
|
|
/delete-node/ rpmh-regulator-ldoa17;
|
|
/delete-node/ rpmh-regulator-smpc1;
|
|
/delete-node/ rpmh-regulator-gfxlvl;
|
|
/delete-node/ rpmh-regulator-mxlvl;
|
|
/delete-node/ rpmh-regulator-mmcxlvl;
|
|
/delete-node/ rpmh-regulator-cxlvl;
|
|
/delete-node/ rpmh-regulator-smpc8;
|
|
/delete-node/ rpmh-regulator-ldoc1;
|
|
/delete-node/ rpmh-regulator-ldoc2;
|
|
/delete-node/ rpmh-regulator-ldoc3;
|
|
/delete-node/ rpmh-regulator-ldoc4;
|
|
/delete-node/ rpmh-regulator-ldoc5;
|
|
/delete-node/ rpmh-regulator-ldoc6;
|
|
/delete-node/ rpmh-regulator-ldoc7;
|
|
/delete-node/ rpmh-regulator-ldoc8;
|
|
/delete-node/ rpmh-regulator-ldoc9;
|
|
/delete-node/ rpmh-regulator-ldoc10;
|
|
/delete-node/ rpmh-regulator-ldoc11;
|
|
/delete-node/ rpmh-regulator-bobc1;
|
|
/delete-node/ rpmh-regulator-smpf2;
|
|
/delete-node/ rpmh-regulator-ldof2;
|
|
/delete-node/ rpmh-regulator-ldof5;
|
|
/delete-node/ rpmh-regulator-ldof6;
|
|
};
|
|
|
|
&slpi_tlmm {
|
|
status = "ok"
|
|
};
|
|
|
|
&soc {
|
|
qfprom: qfprom@780130 {
|
|
compatible = "qcom,qfprom";
|
|
reg = <0x00780130 0x4>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
read-only;
|
|
ranges;
|
|
};
|
|
mtl_rx_setup: rx-queues-config {
|
|
snps,rx-queues-to-use = <4>;
|
|
snps,rx-sched-sp;
|
|
|
|
queue0 {
|
|
snps,dcb-algorithm;
|
|
snps,map-to-dma-channel = <0x0>;
|
|
snps,route-up;
|
|
snps,priority = <0x1>;
|
|
};
|
|
|
|
queue1 {
|
|
snps,dcb-algorithm;
|
|
snps,map-to-dma-channel = <0x1>;
|
|
snps,route-ptp;
|
|
};
|
|
|
|
queue2 {
|
|
snps,avb-algorithm;
|
|
snps,map-to-dma-channel = <0x2>;
|
|
snps,route-avcp;
|
|
};
|
|
|
|
queue3 {
|
|
snps,avb-algorithm;
|
|
snps,map-to-dma-channel = <0x3>;
|
|
snps,priority = <0xC>;
|
|
};
|
|
};
|
|
|
|
mtl_tx_setup: tx-queues-config {
|
|
snps,tx-queues-to-use = <4>;
|
|
snps,tx-sched-sp;
|
|
queue0 {
|
|
snps,dcb-algorithm;
|
|
};
|
|
|
|
queue1 {
|
|
snps,dcb-algorithm;
|
|
};
|
|
|
|
queue2 {
|
|
snps,avb-algorithm;
|
|
snps,send_slope = <0x1000>;
|
|
snps,idle_slope = <0x1000>;
|
|
snps,high_credit = <0x3E800>;
|
|
snps,low_credit = <0xFFC18000>;
|
|
};
|
|
|
|
queue3 {
|
|
snps,avb-algorithm;
|
|
snps,send_slope = <0x1000>;
|
|
snps,idle_slope = <0x1000>;
|
|
snps,high_credit = <0x3E800>;
|
|
snps,low_credit = <0xFFC18000>;
|
|
};
|
|
};
|
|
|
|
ethqos_hw: qcom,ethernet@20000 {
|
|
compatible = "qcom,stmmac-ethqos";
|
|
qcom,arm-smmu;
|
|
reg = <0x20000 0x10000>,
|
|
<0x36000 0x100>,
|
|
<0x3D00000 0x300000>;
|
|
reg-names = "stmmaceth", "rgmii","tlmm-central-base";
|
|
clocks = <&gcc GCC_EMAC_AXI_CLK>,
|
|
<&gcc GCC_EMAC_SLV_AHB_CLK>,
|
|
<&gcc GCC_EMAC_PTP_CLK>,
|
|
<&gcc GCC_EMAC_RGMII_CLK>;
|
|
clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";
|
|
snps,ptp-ref-clk-rate = <250000000>;
|
|
snps,ptp-req-clk-rate = <96000000>;
|
|
interrupts-extended = <&intc 0 689 4>, <&intc 0 699 4>,
|
|
<&tlmm 124 2>;
|
|
interrupt-names = "macirq", "eth_lpi",
|
|
"phy-intr";
|
|
snps,tso;
|
|
snps,pbl = <32>;
|
|
rx-fifo-depth = <16384>;
|
|
tx-fifo-depth = <20480>;
|
|
snps,mtl-rx-config = <&mtl_rx_setup>;
|
|
snps,mtl-tx-config = <&mtl_tx_setup>;
|
|
snps,reset-gpios = <&tlmm 79 GPIO_ACTIVE_HIGH>;
|
|
qcom,phy-intr-redirect = <&tlmm 124 GPIO_ACTIVE_LOW>;
|
|
gdsc_emac-supply = <&emac_gdsc>;
|
|
|
|
pinctrl-names = "dev-emac-mdc",
|
|
"dev-emac-mdio",
|
|
"dev-emac-rgmii_txd0_state",
|
|
"dev-emac-rgmii_txd1_state",
|
|
"dev-emac-rgmii_txd2_state",
|
|
"dev-emac-rgmii_txd3_state",
|
|
"dev-emac-rgmii_txc_state",
|
|
"dev-emac-rgmii_tx_ctl_state",
|
|
"dev-emac-rgmii_rxd0_state",
|
|
"dev-emac-rgmii_rxd1_state",
|
|
"dev-emac-rgmii_rxd2_state",
|
|
"dev-emac-rgmii_rxd3_state",
|
|
"dev-emac-rgmii_rxc_state",
|
|
"dev-emac-rgmii_rx_ctl_state",
|
|
"dev-emac-phy_intr",
|
|
"dev-emac-phy_reset_state",
|
|
"dev-emac_pin_pps_0";
|
|
|
|
pinctrl-0 = <&emac_mdc>;
|
|
pinctrl-1 = <&emac_mdio>;
|
|
|
|
pinctrl-2 = <&emac_rgmii_txd0>;
|
|
pinctrl-3 = <&emac_rgmii_txd1>;
|
|
pinctrl-4 = <&emac_rgmii_txd2>;
|
|
pinctrl-5 = <&emac_rgmii_txd3>;
|
|
pinctrl-6 = <&emac_rgmii_txc>;
|
|
pinctrl-7 = <&emac_rgmii_tx_ctl>;
|
|
|
|
pinctrl-8 = <&emac_rgmii_rxd0>;
|
|
pinctrl-9 = <&emac_rgmii_rxd1>;
|
|
pinctrl-10 = <&emac_rgmii_rxd2>;
|
|
pinctrl-11 = <&emac_rgmii_rxd3>;
|
|
pinctrl-12 = <&emac_rgmii_rxc>;
|
|
pinctrl-13 = <&emac_rgmii_rx_ctl>;
|
|
|
|
pinctrl-14 = <&emac_phy_intr>;
|
|
pinctrl-15 = <&emac_phy_reset_state>;
|
|
pinctrl-16 = <&emac_pin_pps_0>;
|
|
|
|
snps,reset-delays-us = <0 11000 70000>;
|
|
phy-mode = "rgmii";
|
|
|
|
ethqos_emb_smmu: ethqos_emb_smmu {
|
|
compatible = "qcom,emac-smmu-embedded";
|
|
iommus = <&apps_smmu 0x3C0 0x0>;
|
|
qcom,iommu-dma = "fastmap";
|
|
qcom,iommu-dma-addr-pool = <0x80000000 0x40000000>;
|
|
};
|
|
};
|
|
|
|
aop-set-ddr-freq {
|
|
compatible = "qcom,aop-set-ddr-freq";
|
|
mboxes = <&qmp_aop 0>;
|
|
mbox-names = "aop";
|
|
};
|
|
|
|
hsi2s: qcom,hsi2s@172c0000 {
|
|
compatible = "qcom,sa8155-hsi2s", "qcom,hsi2s";
|
|
number-of-interfaces = <3>;
|
|
reg = <0x172c0000 0x28000>,
|
|
<0x17080000 0xe000>;
|
|
reg-names = "lpa_if", "lpass_tcsr";
|
|
interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
|
|
number-of-rate-detectors = <2>;
|
|
rate-detector-interfaces = <0 1>;
|
|
iommus = <&apps_smmu 0x1B5C 0x1>,
|
|
<&apps_smmu 0x1B5E 0x0>;
|
|
qcom,iommu-dma-addr-pool = <0x0 0xFFFFFFFF>;
|
|
|
|
sdr0: qcom,hs0_i2s {
|
|
compatible = "qcom,hsi2s-interface";
|
|
minor-number = <0>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&hs1_i2s_mclk_active &hs1_i2s_sck_active
|
|
&hs1_i2s_ws_active &hs1_i2s_data0_active
|
|
&hs1_i2s_data1_active>;
|
|
pinctrl-1 = <&hs1_i2s_mclk_sleep &hs1_i2s_sck_sleep
|
|
&hs1_i2s_ws_sleep &hs1_i2s_data0_sleep
|
|
&hs1_i2s_data1_sleep>;
|
|
bit-clock-hz = <12288000>;
|
|
data-buffer-ms = <10>;
|
|
bit-depth = <32>;
|
|
spkr-channel-count = <2>;
|
|
mic-channel-count = <2>;
|
|
pcm-rate = <2>;
|
|
pcm-sync-src = <0>;
|
|
aux-mode = <0>;
|
|
rpcm-width = <1>;
|
|
tpcm-width = <1>;
|
|
enable-tdm = <1>;
|
|
tdm-rate = <32>;
|
|
tdm-rpcm-width = <16>;
|
|
tdm-tpcm-width = <16>;
|
|
tdm-sync-delay = <2>;
|
|
tdm-inv-sync = <0>;
|
|
pcm-lane-config = <1>;
|
|
};
|
|
|
|
sdr1: qcom,hs1_i2s {
|
|
compatible = "qcom,hsi2s-interface";
|
|
minor-number = <1>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&hs2_i2s_mclk_active &hs2_i2s_sck_active
|
|
&hs2_i2s_ws_active &hs2_i2s_data0_active
|
|
&hs2_i2s_data1_active>;
|
|
pinctrl-1 = <&hs2_i2s_mclk_sleep &hs2_i2s_sck_sleep
|
|
&hs2_i2s_ws_sleep &hs2_i2s_data0_sleep
|
|
&hs2_i2s_data1_sleep>;
|
|
bit-clock-hz = <12288000>;
|
|
data-buffer-ms = <10>;
|
|
bit-depth = <32>;
|
|
spkr-channel-count = <2>;
|
|
mic-channel-count = <2>;
|
|
pcm-rate = <2>;
|
|
pcm-sync-src = <0>;
|
|
aux-mode = <0>;
|
|
rpcm-width = <1>;
|
|
tpcm-width = <1>;
|
|
enable-tdm = <1>;
|
|
tdm-rate = <32>;
|
|
tdm-rpcm-width = <16>;
|
|
tdm-tpcm-width = <16>;
|
|
tdm-sync-delay = <2>;
|
|
tdm-inv-sync = <0>;
|
|
pcm-lane-config = <1>;
|
|
};
|
|
|
|
sdr2: qcom,hs2_i2s {
|
|
compatible = "qcom,hsi2s-interface";
|
|
minor-number = <2>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&hs3_i2s_mclk_active &hs3_i2s_sck_active
|
|
&hs3_i2s_ws_active &hs3_i2s_data0_active
|
|
&hs3_i2s_data1_active>;
|
|
pinctrl-1 = <&hs3_i2s_mclk_sleep &hs3_i2s_sck_sleep
|
|
&hs3_i2s_ws_sleep &hs3_i2s_data0_sleep
|
|
&hs3_i2s_data1_sleep>;
|
|
bit-clock-hz = <12288000>;
|
|
data-buffer-ms = <10>;
|
|
bit-depth = <32>;
|
|
spkr-channel-count = <2>;
|
|
mic-channel-count = <2>;
|
|
pcm-rate = <2>;
|
|
pcm-sync-src = <0>;
|
|
aux-mode = <0>;
|
|
rpcm-width = <1>;
|
|
tpcm-width = <1>;
|
|
enable-tdm = <1>;
|
|
tdm-rate = <32>;
|
|
tdm-rpcm-width = <16>;
|
|
tdm-tpcm-width = <16>;
|
|
tdm-sync-delay = <2>;
|
|
tdm-inv-sync = <0>;
|
|
pcm-lane-config = <1>;
|
|
};
|
|
};
|
|
|
|
aop-msg-client {
|
|
compatible = "qcom,debugfs-qmp-client";
|
|
mboxes = <&qmp_aop 0>;
|
|
mbox-names = "aop";
|
|
};
|
|
};
|
|
|
|
&usb2_phy0 {
|
|
vdd-supply = <&pm8150_1_l5>;
|
|
vdda18-supply = <&pm8150_1_l12>;
|
|
vdda33-supply = <&pm8150_1_l2>;
|
|
};
|
|
|
|
&usb2_phy1 {
|
|
vdd-supply = <&pm8150_1_l5>;
|
|
vdda18-supply = <&pm8150_1_l12>;
|
|
vdda33-supply = <&pm8150_1_l2>;
|
|
};
|
|
|
|
&usb_qmp_phy {
|
|
vdd-supply = <&pm8150_1_l5>;
|
|
core-supply = <&pm8150_2_l8>;
|
|
};
|
|
|
|
/* Add regulator nodes specific to SA8155 */
|
|
#include "sa8155-regulator.dtsi"
|
|
|
|
&pcie0 {
|
|
vreg-1p8-supply = <&pm8150_2_l8>;
|
|
vreg-0p9-supply = <&pm8150_2_l18>;
|
|
qcom,no-l1-supported;
|
|
qcom,no-l1ss-supported;
|
|
qcom,no-aux-clk-sync;
|
|
qcom,core-preset = <0x77777777>;
|
|
};
|
|
|
|
&pcie1 {
|
|
vreg-1p8-supply = <&pm8150_2_l8>;
|
|
vreg-0p9-supply = <&pm8150_2_l18>;
|
|
qcom,core-preset = <0x77777777>;
|
|
};
|
|
|
|
&gpucc {
|
|
compatible = "qcom,sa8155-gpucc", "syscon";
|
|
};
|
|
|
|
&scc {
|
|
vdd_scc_cx-supply = <&VDD_CX_LEVEL>;
|
|
status = "ok"
|
|
};
|
|
|
|
&gpu_gx_gdsc {
|
|
parent-supply = <&VDD_GFX_LEVEL>;
|
|
};
|
|
|
|
&pil_ssc {
|
|
vdd_cx-supply = <&VDD_CX_LEVEL>;
|
|
vdd_mx-supply = <&VDD_MX_LEVEL>;
|
|
};
|
|
|
|
&pil_modem {
|
|
vdd_mss-supply = <&pm8150_1_s8_level>;
|
|
};
|
|
|
|
&ufsphy_mem {
|
|
vdda-phy-supply = <&pm8150_2_l18>;
|
|
};
|
|
|
|
&msm_fastrpc {
|
|
qcom,adsp-remoteheap-vmid = <3 5 6>;
|
|
};
|
|
|
|
&reserved_memory {
|
|
/* pil_wlan_fw_mem is only used when iHelium is attached,
|
|
* so remove the node for sa8155
|
|
*/
|
|
/delete-node/ pil_wlan_fw_mem;
|
|
|
|
uefi_log: uefi_log@9241C000 {
|
|
reg = <0x0 0x9241C000 0x0 0x10000>;
|
|
label = "uefi_log";
|
|
};
|
|
};
|
|
|
|
#include "camera/sa8155-camera.dtsi"
|
|
#include "camera/sa8155-camera-sensor.dtsi"
|
|
#include "sa8155-audio.dtsi"
|
|
|
|
&lmh_dcvs1 {
|
|
isens_vref_0p8-supply = <&pm8150_1_l5_ao>;
|
|
isens_vref_1p8-supply = <&pm8150_1_l12_ao>;
|
|
};
|
|
|
|
&thermal_zones {
|
|
gpuss-max-step {
|
|
trips {
|
|
gpu-trip0 {
|
|
temperature = <105000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
pop-mem-step {
|
|
status = "disabled";
|
|
};
|
|
|
|
npu-step {
|
|
trips {
|
|
npu-trip0 {
|
|
temperature = <105000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-0-0-step {
|
|
trips {
|
|
cpu00-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-0-1-step {
|
|
trips {
|
|
cpu01-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-0-2-step {
|
|
trips {
|
|
cpu02-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-0-3-step {
|
|
trips {
|
|
cpu03-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-1-0-step {
|
|
trips {
|
|
cpu10-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-1-1-step {
|
|
trips {
|
|
cpu11-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-1-2-step {
|
|
trips {
|
|
cpu12-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-1-3-step {
|
|
trips {
|
|
cpu13-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-1-4-step {
|
|
trips {
|
|
cpu14-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-1-5-step {
|
|
trips {
|
|
cpu15-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-1-6-step {
|
|
trips {
|
|
cpu16-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-1-7-step {
|
|
trips {
|
|
cpu17-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
q6-hvx-step {
|
|
trips {
|
|
q6-hvx-step0 {
|
|
temperature = <105000>;
|
|
};
|
|
|
|
q6-hvx-step1 {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
};
|