mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 02:32:09 -04:00
f2e816bcb5
This change is to add a flag to reset the pine EP post link-up. Change-Id: I01ef2fd3790b270180166924dcfbfe36aeaee099
85 lines
1.4 KiB
Devicetree
85 lines
1.4 KiB
Devicetree
#include "sdxlemur-qcn9000.dtsi"
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&soc {
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pine_vreg: pine_vreg {
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compatible = "regulator-fixed";
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regulator-name = "pine_vreg";
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gpio = <&tlmm 102 GPIO_ACTIVE_HIGH>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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regulator-enable-ramp-delay = <200000>;
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};
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};
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&qps615_vreg {
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vin-supply = <&pine_vreg>;
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};
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&pcie_i2c_ctrl {
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ep_reset_postlinkup;
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reg_update = <0x82c030 0x1
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0x828000 0x3
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0x82bd00 0x8
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0x82c030 0x2
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0x828000 0x3
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0x82bd00 0x8
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0x82c030 0x8
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0x828000 0x1
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0x82bd00 0x8
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0x82c01c 0x10
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0x82c030 0xf
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0x828000 0xf
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0x82b268 0x2>;
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};
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&pcie0 {
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qcom,no-l0s-supported;
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qcom,no-l1-supported;
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qcom,no-l1ss-supported;
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qcom,no-aux-clk-sync;
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};
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&pcie0_bus2_dev1_fn0 {
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cnss_pci1: cnss_pci1 {
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reg = <0 0 0 0 0>;
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qcom,iommu-group = <&qcn9000_pci_iommu_group_0>;
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memory-region = <&qcn9000_0_mem>;
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qrtr_instance_id = <0x20>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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&pcie0_bus2_dev2_fn0 {
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cnss_pci2: cnss_pci2 {
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reg = <0 0 0 0 0>;
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qcom,iommu-group = <&qcn9000_pci_iommu_group_1>;
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memory-region = <&qcn9000_1_mem>;
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qrtr_instance_id = <0x21>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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&wifi0 {
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/* QCN9000 5G with SBS filter */
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status = "ok"
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board_id = <0xa3>;
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};
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&wifi1 {
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/* QCN9000 2G */
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status = "ok"
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board_id = <0xa1>;
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};
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&qcn9000_0_mem {
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status = "ok"
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};
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&qcn9000_1_mem {
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status = "ok"
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};
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