mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-11-08 03:33:25 -05:00
0d80ad0f74
Add bluetooth node and related resources. Change-Id: Ib199668f780b92f03e2db59f8471b2a48d88dfeb
391 lines
11 KiB
Devicetree
391 lines
11 KiB
Devicetree
#include <dt-bindings/clock/qcom,gcc-direwolf.h>
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#include "quin-vm-common.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. Direwolf Virtual Machine";
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qcom,msm-name = "Direwolf V1";
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qcom,msm-id = <460 0x10000>;
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aliases {
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hsuart0 = &qupv3_se2_4uart;
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};
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firmware:firmware {
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android {
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/delete-property/ boot_devices;
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fstab {
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vendor {
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dev="/dev/block/platform/vdevs/1c160000.virtio_blk/vendor";
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fsmgr_flags = "wait";
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};
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};
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};
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};
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};
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&soc {
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tlmm: pinctrl@f000000 {
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compatible = "qcom,direwolf-pinctrl";
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reg = <0x0F000000 0x1000000>;
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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apps_smmu: apps-smmu@15000000 {
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compatible = "qcom,qsmmu-v500";
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reg = <0x15000000 0x100000>,
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<0x15182000 0x20>;
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reg-names = "base", "tcu-base";
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#iommu-cells = <2>;
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qcom,skip-init;
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qcom,use-3-lvl-tables;
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#global-interrupts = <2>;
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#size-cells = <1>;
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#address-cells = <1>;
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ranges;
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interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 689 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 709 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 710 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 711 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 712 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 713 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 714 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 715 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 912 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 911 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 910 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 909 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 908 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 907 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 906 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 905 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 904 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 903 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 902 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 901 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 900 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 899 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 898 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 896 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 895 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 894 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 893 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 892 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 891 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 890 IRQ_TYPE_LEVEL_HIGH>;
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};
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qtee_shmbridge {
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compatible = "qcom,tee-shared-memory-bridge";
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};
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qcom_qseecom: qseecom@c1800000 {
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compatible = "qcom,qseecom";
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reg = <0xc1800000 0x3900000>;
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reg-names = "secapp-region";
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memory-region = <&qseecom_mem>;
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qcom,hlos-num-ce-hw-instances = <1>;
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qcom,hlos-ce-hw-instance = <0>;
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qcom,qsee-ce-hw-instance = <0>;
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qcom,disk-encrypt-pipe-pair = <2>;
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qcom,no-clock-support;
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qcom,qsee-reentrancy-support = <2>;
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};
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msm_gpu_hyp: qcom,hgsl {
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compatible = "qcom,hgsl";
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/* TBD, complete doorbell */
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db-off = <1>;
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};
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pdc: interrupt-controller@b220000 {
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compatible = "qcom,direwolf-pdc";
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reg = <0xb220000 0x30000>;
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qcom,pdc-ranges = <14 494 2>, <138 623 1>;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupt-controller;
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};
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subsys_notif_virt: qcom,subsys_notif_virt@2D000000 {
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compatible = "qcom,subsys-notif-virt";
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reg = <0x2D000000 0x400>;
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reg-names = "vdev_base";
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cdsp0 {
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subsys-name = "cdsp0";
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interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "state-irq";
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type = "virtual";
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offset = <768>;
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};
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};
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VDD_CX_LEVEL:
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S1A0_LEVEL: pm8540_a0_s1_level: regulator-pm8540_a0-s1-level {
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compatible = "qcom,stub-regulator";
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regulator-name = "pm8540_a0_s1_level";
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regulator-min-microvolt =
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<RPMH_REGULATOR_LEVEL_RETENTION>;
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regulator-max-microvolt =
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<RPMH_REGULATOR_LEVEL_MAX>;
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};
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pcie_2a_pipe_clk: pcie_2a_pipe_clk {
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compatible = "fixed-clock";
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clock-frequency = <1000>;
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clock-output-names = "pcie_2a_pipe_clk";
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#clock-cells = <0>;
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};
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pcie_2b_pipe_clk: pcie_2b_pipe_clk {
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compatible = "fixed-clock";
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clock-frequency = <1000>;
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clock-output-names = "pcie_2b_pipe_clk";
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#clock-cells = <0>;
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};
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pcie_3a_pipe_clk: pcie_3a_pipe_clk {
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compatible = "fixed-clock";
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clock-frequency = <1000>;
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clock-output-names = "pcie_3a_pipe_clk";
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#clock-cells = <0>;
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};
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pcie_3b_pipe_clk: pcie_3b_pipe_clk {
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compatible = "fixed-clock";
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clock-frequency = <1000>;
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clock-output-names = "pcie_3b_pipe_clk";
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#clock-cells = <0>;
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};
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pcie_4_pipe_clk: pcie_4_pipe_clk {
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compatible = "fixed-clock";
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clock-frequency = <1000>;
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clock-output-names = "pcie_4_pipe_clk";
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#clock-cells = <0>;
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};
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};
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®ulator {
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gcc_usb30_prim_gdsc: gcc_usb30_prim_gdsc {
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regulator-name = "gcc_usb30_prim_gdsc";
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};
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gcc_usb30_sec_gdsc: gcc_usb30_sec_gdsc {
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regulator-name = "gcc_usb30_sec_gdsc";
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};
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gcc_pcie_2a_gdsc: gcc_pcie_2a_gdsc {
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regulator-name = "gcc_pcie_2a_gdsc";
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};
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gcc_pcie_2b_gdsc: gcc_pcie_2b_gdsc {
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regulator-name = "gcc_pcie_2b_gdsc";
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};
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gcc_pcie_3a_gdsc: gcc_pcie_3a_gdsc {
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regulator-name = "gcc_pcie_3a_gdsc";
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};
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gcc_pcie_3b_gdsc: gcc_pcie_3b_gdsc {
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regulator-name = "gcc_pcie_3b_gdsc";
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};
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gcc_pcie_4_gdsc: gcc_pcie_4_gdsc {
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regulator-name = "gcc_pcie_4_gdsc";
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};
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L3A0: pm8540_a0_l3: regulator-pm8540_a0-l3 {
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regulator-name = "ldoa3";
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regulator-min-microvolt = <1140000>;
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regulator-max-microvolt = <1260000>;
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};
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S4E0: pm8540_e0_s4: regulator-pm8540_e0-s4 {
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regulator-name = "smpe4";
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regulator-min-microvolt = <320000>;
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regulator-max-microvolt = <2040000>;
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};
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L5A0: pm8540_a0_l5: regulator-pm8540_a0-l5 {
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regulator-name = "ldoa5";
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regulator-min-microvolt = <720000>;
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regulator-max-microvolt = <950000>;
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};
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L6G0: pm8540_g0_l6: regulator-pm8540_g0-l6 {
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regulator-name = "ldog6";
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};
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L7A0: pm8540_a0_l7: regulator-pm8540_a0-l7 {
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regulator-name = "ldoa7";
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regulator-min-microvolt = <1620000>;
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regulator-max-microvolt = <1980000>;
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};
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L11A0: pm8540_a0_l11: regulator-pm8540_a0-l11 {
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regulator-name = "ldoa11";
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regulator-min-microvolt = <830000>;
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regulator-max-microvolt = <920000>;
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};
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L13A0: pm8540_a0_l13: regulator-pm8540_a0-l13 {
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regulator-name = "ldoa13";
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regulator-min-microvolt = <2970000>;
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regulator-max-microvolt = <3544000>;
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};
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L1C0: pm8540_c0_l1: regulator-pm8540_c0-l1 {
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regulator-name = "ldoc1";
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regulator-min-microvolt = <720000>;
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regulator-max-microvolt = <950000>;
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};
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L7C0: pm8540_c0_l7: regulator-pm8540_c0-l7 {
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regulator-name = "ldoc7";
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regulator-min-microvolt = <1620000>;
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regulator-max-microvolt = <1980000>;
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};
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L2C0: pm8540_c0_l2: regulator-pm8540_c0-l2 {
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regulator-name = "ldoc2";
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regulator-min-microvolt = <2970000>;
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regulator-max-microvolt = <3544000>;
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};
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L15A0: pm8540_a0_l15: regulator-pm8540_a0-l15 {
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regulator-name = "ldoa15";
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};
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};
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&firmware {
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scm {
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compatible = "qcom,scm";
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};
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};
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#include "direwolf-pinctrl.dtsi"
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#include "direwolf-qupv3.dtsi"
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#include "pm8540-vm.dtsi"
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#include "direwolf-vm-audio.dtsi"
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#include "direwolf-vm-usb.dtsi"
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#include "direwolf-cnss.dtsi"
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&qupv3_0 {
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/delete-property/ qcom,msm-bus,num-paths;
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/delete-property/ qcom,msm-bus,vectors-bus-ids;
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};
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&qupv3_1 {
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/delete-property/ qcom,msm-bus,num-paths;
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/delete-property/ qcom,msm-bus,vectors-bus-ids;
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};
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&qupv3_2 {
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/delete-property/ qcom,msm-bus,num-paths;
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/delete-property/ qcom,msm-bus,vectors-bus-ids;
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};
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