Joel Stanley
1d7592f84f
reset: simple: Enable for ASPEED systems ...
ASPEED BMC SoCs have a reset controller in the LPC IP that can be
controlled using this driver to release the UARTs from reset.
No special configuration is required, so only the compatible string is
added.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-02-20 17:42:29 +01:00
reset: hi6220: Set module license so that it can be loaded
2017-05-24 10:53:41 +02:00
reset: sti: Use devm_kcalloc() in syscfg_reset_controller_register()
2017-05-15 08:59:08 +02:00
reset: make device_reset_optional() really optional
2017-11-27 09:16:39 +01:00
reset: simple: Enable for ASPEED systems
2018-02-20 17:42:29 +01:00
ARM: SoC driver updates for v4.15
2017-11-16 16:05:01 -08:00
reset: Add Altera Arria10 SR Reset Controller
2017-03-15 12:19:11 +01:00
ARC: reset: introduce AXS10x reset driver
2017-09-18 18:41:27 +02:00
ARC: reset: remove the misleading v1 suffix all over
2017-09-18 13:02:03 +02:00
reset: Add i.MX7 SRC reset driver
2017-03-15 12:18:49 +01:00
reset: Add a reset controller driver for the Lantiq XWAY based SoCs
2017-09-04 21:19:02 +02:00
reset: meson: enable level reset support on Meson8b
2018-02-16 15:32:09 +01:00
reset: pistachio: make it explicitly non-modular
2017-03-08 09:36:45 +01:00
reset: simple: Enable for ASPEED systems
2018-02-20 17:42:29 +01:00
reset: socfpga: use the reset-simple driver
2017-10-18 15:51:02 +02:00
reset: sunxi: use reset-simple driver
2017-10-17 15:35:24 +02:00
reset: Add the TI SCI reset driver
2017-06-06 09:44:17 +02:00
reset: uniphier: add PXs3 reset data
2017-10-05 10:24:14 +02:00
1d7592f84f