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Filename Latest commit message Latest commit date
Venkat Chinta 5619d4e93e msm: camera: ife: Unmask top level bus write IRQ bit
During VFE reset we mask all bits apart from reset done. Since
the top level bus write IRQ bit is common to all output ports
it is set during the initialize hardware sequence. However since
initialize hardware is not invoked in start only case that follows
flush, we must set it again.

CRs-Fixed: 2590331
Change-Id: I73f09e552779bd65f472178c1025594be03025fb
Signed-off-by: Venkat Chinta <vchinta@codeaurora.org>
2020-03-05 11:10:07 -08:00
config msm: camera: config: Fix lahaina configuration 2020-01-10 14:48:45 -08:00
drivers msm: camera: ife: Unmask top level bus write IRQ bit 2020-03-05 11:10:07 -08:00
include/uapi msm: camera: isp: Add support for PHY TPG 2020-02-10 15:17:44 -08:00
Makefile msm: camera: config: Fix lahaina configuration 2020-01-10 14:48:45 -08:00