mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 02:32:09 -04:00
200 lines
4.2 KiB
Devicetree
200 lines
4.2 KiB
Devicetree
#include "lahaina-qrd-common.dtsi"
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#include "camera/lahaina-camera-sensor-hdk.dtsi"
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&wsa883x_0222 {
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status = "disabled";
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};
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&wsa_spkr_en2 {
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status = "disabled";
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};
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&lahaina_snd {
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qcom,model = "lahaina-hdk-snd-card";
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qcom,audio-routing =
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"AMIC1", "Analog Mic1",
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"Analog Mic1", "MIC BIAS1",
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"AMIC2", "Analog Mic2",
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"Analog Mic2", "MIC BIAS2",
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"AMIC3", "Analog Mic3",
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"Analog Mic3", "MIC BIAS3",
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"AMIC4", "Analog Mic4",
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"Analog Mic4", "MIC BIAS3",
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"AMIC5", "Analog Mic5",
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"Analog Mic5", "MIC BIAS4",
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"TX DMIC0", "Digital Mic0",
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"Digital Mic0", "MIC BIAS1",
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"TX DMIC1", "Digital Mic1",
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"Digital Mic1", "MIC BIAS1",
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"TX DMIC2", "Digital Mic2",
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"Digital Mic2", "MIC BIAS3",
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"TX DMIC3", "Digital Mic3",
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"Digital Mic3", "MIC BIAS3",
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"TX DMIC4", "Digital Mic4",
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"Digital Mic4", "MIC BIAS4",
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"TX DMIC5", "Digital Mic5",
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"Digital Mic5", "MIC BIAS4",
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"IN1_HPHL", "HPHL_OUT",
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"IN2_HPHR", "HPHR_OUT",
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"IN3_AUX", "AUX_OUT",
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"HAP_IN", "PCM_OUT",
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"WSA SRC0_INP", "SRC0",
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"WSA_TX DEC0_INP", "TX DEC0 MUX",
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"WSA_TX DEC1_INP", "TX DEC1 MUX",
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"RX_TX DEC0_INP", "TX DEC0 MUX",
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"RX_TX DEC1_INP", "TX DEC1 MUX",
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"RX_TX DEC2_INP", "TX DEC2 MUX",
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"RX_TX DEC3_INP", "TX DEC3 MUX",
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"SpkrLeft IN", "WSA_SPK1 OUT",
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"TX SWR_INPUT", "WCD_TX_OUTPUT",
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"VA SWR_INPUT", "VA_SWR_CLK",
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"VA SWR_INPUT", "WCD_TX_OUTPUT",
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"VA_AIF1 CAP", "VA_SWR_CLK",
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"VA_AIF2 CAP", "VA_SWR_CLK",
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"VA_AIF3 CAP", "VA_SWR_CLK",
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"VA DMIC0", "Digital Mic0",
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"VA DMIC1", "Digital Mic1",
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"VA DMIC2", "Digital Mic2",
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"VA DMIC3", "Digital Mic3",
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"VA DMIC4", "Digital Mic4",
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"VA DMIC5", "Digital Mic5",
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"Digital Mic0", "VA MIC BIAS1",
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"Digital Mic1", "VA MIC BIAS1",
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"Digital Mic2", "VA MIC BIAS3",
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"Digital Mic3", "VA MIC BIAS3",
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"Digital Mic4", "VA MIC BIAS4",
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"Digital Mic5", "VA MIC BIAS4";
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qcom,msm-mbhc-usbc-audio-supported = <0>;
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qcom,msm-mbhc-hphl-swh = <1>;
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qcom,msm-mbhc-gnd-swh = <1>;
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qcom,wsa-max-devs = <1>;
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};
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&usb1 {
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dwc3@a800000 {
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dr_mode = "host";
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};
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};
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&sdhc_2 {
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cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>;
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};
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&qupv3_se15_i2c {
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status = "ok"
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lt9611: lt,lt9611@2b {
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compatible = "lt,lt9611uxc";
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reg = <0x2b>;
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interrupt-parent = <&tlmm>;
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interrupts = <50 0>;
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interrupt-names = "lt_irq";
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lt,irq-gpio = <&tlmm 50 0x0>;
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lt,reset-gpio = <&tlmm 48 0x0>;
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lt,hdmi-3p3-en = <&tlmm 47 0x0>;
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lt,hdmi-1p2-en = <&tlmm 49 0x0>;
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lt,non-pluggable;
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pinctrl-names = "default";
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pinctrl-0 = <<9611_pins>;
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lt,preferred-mode = "1920x1080";
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lt,customize-modes {
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lt,customize-mode-id@0 {
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lt,mode-h-active = <1920>;
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lt,mode-h-front-porch = <88>;
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lt,mode-h-pulse-width = <44>;
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lt,mode-h-back-porch = <148>;
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lt,mode-h-active-high;
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lt,mode-v-active = <1080>;
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lt,mode-v-front-porch = <4>;
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lt,mode-v-pulse-width = <5>;
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lt,mode-v-back-porch = <36>;
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lt,mode-v-active-high;
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lt,mode-refresh-rate = <60>;
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lt,mode-clock-in-khz = <148500>;
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};
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lt,customize-mode-id@1 {
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lt,mode-h-active = <3840>;
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lt,mode-h-front-porch = <176>;
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lt,mode-h-pulse-width = <88>;
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lt,mode-h-back-porch = <400>;
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lt,mode-h-active-high;
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lt,mode-v-active = <2160>;
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lt,mode-v-front-porch = <8>;
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lt,mode-v-pulse-width = <10>;
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lt,mode-v-back-porch = <72>;
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lt,mode-v-active-high;
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lt,mode-refresh-rate = <60>;
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lt,mode-clock-in-khz = <608040>;
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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lt9611_in_0: endpoint {
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remote-endpoint = <&ext_dsi_0_out>;
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};
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};
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port@1 {
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reg = <1>;
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lt9611_in_1: endpoint {
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remote-endpoint = <&ext_dsi_1_out>;
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};
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};
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};
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};
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};
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&sde_dsi {
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qcom,dsi-default-panel = <&dsi_ext_bridge_1080p>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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ext_dsi_0_out: endpoint {
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remote-endpoint = <<9611_in_0>;
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};
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};
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};
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};
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&sde_dsi1 {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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ext_dsi_1_out: endpoint {
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remote-endpoint = <<9611_in_1>;
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};
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};
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};
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};
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&pcie1 {
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qcom,link-check-max-count = <50>;
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qcom,ep-gpio = <&tlmm 6 0>;
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qcom,boot-option = <0x0>;
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};
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&dsi_panel_pwr_supply {
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qcom,panel-supply-entry@0 {
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qcom,supply-min-voltage = <1860000>;
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qcom,supply-max-voltage = <1860000>;
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};
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};
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