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b6018958a5
With the PXA270 MMC hardware, there seems to be an issue of data corruption on writes where a 4KB data block is offset by one byte. If we delay enabling the DMA for writes until after the CMD/RESP has finished, the problem seems to be fixed. related to PXA270 Erratum #91 Tested-by: Vernon Sauder <[email protected]> Signed-off-by: Cliff Brake <[email protected]> Acked-by: Eric Miao <[email protected]> Signed-off-by: Pierre Ossman <[email protected]> |
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