mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-30 11:41:38 -04:00
11fea7e985
Increase number of Rx and Tx descriptors to 1024 from 256 Change-Id: Ia3f131606cd7c4a55a5754539fec2e93d7b28e86
180 lines
3.3 KiB
Devicetree
180 lines
3.3 KiB
Devicetree
#include "sdxlemur-mtp.dtsi"
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&soc {
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ioss_aqc_eth0_rx: aqc_rx@eth0 {
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qcom,dir-rx;
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qcom,rx-filter-be;
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qcom,ring-size = <1024>;
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qcom,buff-size = <2048>;
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qcom,mod-count-min = <15>;
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qcom,mod-count-max = <25>;
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qcom,mod-usecs-min = <64>;
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qcom,mod-usecs-max = <128>;
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};
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ioss_aqc_eth0_tx: aqc_tx@eth0 {
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qcom,dir-tx;
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qcom,ring-size = <1024>;
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qcom,buff-size = <2048>;
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qcom,mod-count-min = <15>;
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qcom,mod-count-max = <25>;
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qcom,mod-usecs-min = <64>;
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qcom,mod-usecs-max = <128>;
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};
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ioss_r8125_eth0_rx: r8125_rx@eth0 {
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qcom,dir-rx;
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qcom,rx-filter-ip;
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qcom,ring-size = <1023>; /* Cannot be a power of 2 */
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qcom,buff-size = <2048>;
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qcom,mod-count-min = <32>;
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qcom,mod-count-max = <64>;
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qcom,mod-usecs-min = <30>;
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qcom,mod-usecs-max = <60>;
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};
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ioss_r8125_eth0_tx: r8125_tx@eth0 {
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qcom,dir-tx;
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qcom,ring-size = <4096>;
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qcom,buff-size = <2048>;
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qcom,mod-count-min = <32>;
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qcom,mod-count-max = <64>;
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qcom,mod-usecs-min = <30>;
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qcom,mod-usecs-max = <60>;
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};
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ioss_r8168_eth0_rx: r8168_rx@eth0 {
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qcom,dir-rx;
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qcom,rx-filter-ip;
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qcom,multi_rx_queues;
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qcom,ring-size = <1024>;
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qcom,buff-size = <2048>;
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qcom,mod-count-min = <32>;
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qcom,mod-count-max = <64>;
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qcom,mod-usecs-min = <30>;
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qcom,mod-usecs-max = <60>;
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};
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ioss_r8168_eth0_tx: r8168_tx@eth0 {
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qcom,dir-tx;
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qcom,ring-size = <1024>;
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qcom,buff-size = <2048>;
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qcom,mod-count-min = <32>;
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qcom,mod-count-max = <64>;
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qcom,mod-usecs-min = <30>;
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qcom,mod-usecs-max = <60>;
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};
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};
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&pcie0_rp {
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#address-cells = <5>;
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#size-cells = <0>;
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aquantia,aqc@pcie0_rp {
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reg = <0 0 0 0 0>;
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compatible = "qcom,ioss-v2-device";
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qcom,ioss = <&ioss>;
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/* ipa shares this group with aqc */
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qcom,iommu-group = <&ipa_eth_group1>;
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qcom,ioss_instance = <0>;
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qcom,ioss_channels =
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<&ioss_aqc_eth0_rx>,
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<&ioss_aqc_eth0_tx>;
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#address-cells = <1>;
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#size-cells = <1>;
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pci-ids =
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"1d6a:0001",
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"1d6a:d107",
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"1d6a:07b1",
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"1d6a:87b1",
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"1d6a:d108",
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"1d6a:08b1",
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"1d6a:88b1",
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"1d6a:d109",
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"1d6a:09b1",
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"1d6a:89b1",
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"1d6a:d100",
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"1d6a:00b1",
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"1d6a:80b1",
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"1d6a:11b1",
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"1d6a:91b1",
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"1d6a:12b1",
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"1d6a:92b1",
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"1d6a:00c0",
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"1d6a:04c0",
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"1d6a:12c0",
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"1d6a:14c0",
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"1d6a:93c0",
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"1d6a:94c0";
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};
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realtek,rtl8125@pcie0_rp {
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reg = <0 0 0 0 0>;
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compatible = "qcom,ioss-v2-device";
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qcom,ioss = <&ioss>;
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qcom,ioss_instance = <0>;
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qcom,ioss_channels =
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<&ioss_r8125_eth0_rx>,
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<&ioss_r8125_eth0_tx>;
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/* ipa shares this group with rtl */
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qcom,iommu-group = <&ipa_eth_group1>;
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#address-cells = <1>;
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#size-cells = <1>;
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pci-ids =
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"10ec:8125",
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"10ec:3000";
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};
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realtek,rtl8168@pcie0_rp {
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reg = <0 0 0 0 0>;
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compatible = "qcom,ioss-v2-device";
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qcom,ioss = <&ioss>;
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qcom,ioss_instance = <0>;
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qcom,ioss_channels =
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<&ioss_r8168_eth0_rx>,
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<&ioss_r8168_eth0_tx>;
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/* ipa shares this group with rtl */
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qcom,iommu-group = <&ipa_eth_group1>;
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pci-ids =
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"10ec:8168",
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"17cb:0308";
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};
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pcie0_generic_ep: pcie0_generic_ep {
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reg = <0 0 0 0 0>;
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qcom,iommu-group = <&pcie0_generic_ep_iommu_group>;
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#address-cells = <1>;
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#size-cells = <1>;
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pcie0_generic_ep_iommu_group: pcie0_generic_ep_iommu_group {
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qcom,iommu-dma = "atomic";
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};
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};
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};
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&pcie0 {
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qcom,target-link-speed = <3>;
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};
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