mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-11-08 11:45:53 -05:00
40e3c555b0
Add display nodes and pinctrl details. Also update platform details. Change-Id: Ic4cb86758231c893d3c1a1cead2d1118103e143a
1030 lines
18 KiB
Devicetree
1030 lines
18 KiB
Devicetree
&soc {
|
|
tlmm: pinctrl@500000 {
|
|
compatible = "qcom,monaco-pinctrl";
|
|
reg = <0x500000 0x300000>;
|
|
interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
wakeup-parent = <&wakegic>;
|
|
|
|
qupv3_se6_2uart_pins: qupv3_se6_2uart_pins {
|
|
qupv3_se6_2uart_active: qupv3_se6_2uart_active {
|
|
mux {
|
|
pins = "gpio30", "gpio31";
|
|
function = "qup06";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio30", "gpio31";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_2uart_sleep: qupv3_se6_2uart_sleep {
|
|
mux {
|
|
pins = "gpio30", "gpio31";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio30", "gpio31";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se0_i2c_pins: qupv3_se0_i2c_pins {
|
|
qupv3_se0_i2c_active: qupv3_se0_i2c_active {
|
|
mux {
|
|
pins = "gpio4", "gpio5";
|
|
function = "qup00";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4", "gpio5";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep {
|
|
mux {
|
|
pins = "gpio4", "gpio5";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4", "gpio5";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se0_spi_pins: qupv3_se0_spi_pins {
|
|
qupv3_se0_spi_active: qupv3_se0_spi_active {
|
|
mux {
|
|
pins = "gpio4", "gpio5",
|
|
"gpio6", "gpio7";
|
|
function = "qup00";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4", "gpio5",
|
|
"gpio6", "gpio7";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
|
|
mux {
|
|
pins = "gpio4", "gpio5",
|
|
"gpio6", "gpio7";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4", "gpio5",
|
|
"gpio6", "gpio7";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se1_i2c_pins: qupv3_se1_i2c_pins {
|
|
qupv3_se1_i2c_active: qupv3_se1_i2c_active {
|
|
mux {
|
|
pins = "gpio10", "gpio11";
|
|
function = "qup01";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio10", "gpio11";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep {
|
|
mux {
|
|
pins = "gpio10", "gpio11";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio10", "gpio11";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se1_spi_pins: qupv3_se1_spi_pins {
|
|
qupv3_se1_spi_active: qupv3_se1_spi_active {
|
|
mux {
|
|
pins = "gpio10", "gpio11",
|
|
"gpio12", "gpio13";
|
|
function = "qup01";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio10", "gpio11",
|
|
"gpio12", "gpio13";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_spi_sleep: qupv3_se1_spi_sleep {
|
|
mux {
|
|
pins = "gpio10", "gpio11",
|
|
"gpio12", "gpio13";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio10", "gpio11",
|
|
"gpio12", "gpio13";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se2_i2c_pins: qupv3_se2_i2c_pins {
|
|
qupv3_se2_i2c_active: qupv3_se2_i2c_active {
|
|
mux {
|
|
pins = "gpio0", "gpio1";
|
|
function = "qup02";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0", "gpio1";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep {
|
|
mux {
|
|
pins = "gpio0", "gpio1";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0", "gpio1";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se2_spi_pins: qupv3_se2_spi_pins {
|
|
qupv3_se2_spi_active: qupv3_se2_spi_active {
|
|
mux {
|
|
pins = "gpio0", "gpio1",
|
|
"gpio2", "gpio3";
|
|
function = "qup02";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0", "gpio1",
|
|
"gpio2", "gpio3";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_spi_sleep: qupv3_se2_spi_sleep {
|
|
mux {
|
|
pins = "gpio0", "gpio1",
|
|
"gpio2", "gpio3";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0", "gpio1",
|
|
"gpio2", "gpio3";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se3_i2c_pins: qupv3_se3_i2c_pins {
|
|
qupv3_se3_i2c_active: qupv3_se3_i2c_active {
|
|
mux {
|
|
pins = "gpio14", "gpio15";
|
|
function = "qup03";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio14", "gpio15";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep {
|
|
mux {
|
|
pins = "gpio14", "gpio15";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio14", "gpio15";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se3_spi_pins: qupv3_se3_spi_pins {
|
|
qupv3_se3_spi_active: qupv3_se3_spi_active {
|
|
mux {
|
|
pins = "gpio14", "gpio15",
|
|
"gpio16", "gpio17";
|
|
function = "qup03";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio14", "gpio15",
|
|
"gpio16", "gpio17";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se3_spi_sleep: qupv3_se3_spi_sleep {
|
|
mux {
|
|
pins = "gpio14", "gpio15",
|
|
"gpio16", "gpio17";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio14", "gpio15",
|
|
"gpio16", "gpio17";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se4_i2c_pins: qupv3_se4_i2c_pins {
|
|
qupv3_se4_i2c_active: qupv3_se4_i2c_active {
|
|
mux {
|
|
pins = "gpio20", "gpio21";
|
|
function = "qup04";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20", "gpio21";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep {
|
|
mux {
|
|
pins = "gpio20", "gpio21";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20", "gpio21";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_pins: qupv3_se4_spi_pins {
|
|
qupv3_se4_spi_active: qupv3_se4_spi_active {
|
|
mux {
|
|
pins = "gpio20", "gpio21",
|
|
"gpio22", "gpio23";
|
|
function = "qup04";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20", "gpio21",
|
|
"gpio22", "gpio23";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_sleep: qupv3_se4_spi_sleep {
|
|
mux {
|
|
pins = "gpio20", "gpio21",
|
|
"gpio22", "gpio23";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20", "gpio21",
|
|
"gpio22", "gpio23";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se5_i2c_pins: qupv3_se5_i2c_pins {
|
|
qupv3_se5_i2c_active: qupv3_se5_i2c_active {
|
|
mux {
|
|
pins = "gpio26", "gpio27";
|
|
function = "qup05";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio26", "gpio27";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_i2c_sleep: qupv3_se5_i2c_sleep {
|
|
mux {
|
|
pins = "gpio26", "gpio27";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio26", "gpio27";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_pins: qupv3_se5_spi_pins {
|
|
qupv3_se5_spi_active: qupv3_se5_spi_active {
|
|
mux {
|
|
pins = "gpio26", "gpio27",
|
|
"gpio28", "gpio29";
|
|
function = "qup05";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio26", "gpio27",
|
|
"gpio28", "gpio29";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_sleep: qupv3_se5_spi_sleep {
|
|
mux {
|
|
pins = "gpio26", "gpio27",
|
|
"gpio28", "gpio29";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio26", "gpio27",
|
|
"gpio28", "gpio29";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se6_i2c_pins: qupv3_se6_i2c_pins {
|
|
qupv3_se6_i2c_active: qupv3_se6_i2c_active {
|
|
mux {
|
|
pins = "gpio24", "gpio25";
|
|
function = "qup06";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24", "gpio25";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep {
|
|
mux {
|
|
pins = "gpio24", "gpio25";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24", "gpio25";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_pins: qupv3_se6_spi_pins {
|
|
qupv3_se6_spi_active: qupv3_se6_spi_active {
|
|
mux {
|
|
pins = "gpio24", "gpio25",
|
|
"gpio30", "gpio31";
|
|
function = "qup06";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24", "gpio25",
|
|
"gpio30", "gpio31";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_sleep: qupv3_se6_spi_sleep {
|
|
mux {
|
|
pins = "gpio24", "gpio25",
|
|
"gpio30", "gpio31";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24", "gpio25",
|
|
"gpio30", "gpio31";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se7_i2c_pins_a: qupv3_se7_i2c_pins_a {
|
|
qupv3_se7_i2c_active_L0_a: qupv3_se7_i2c_active_L0_a {
|
|
mux {
|
|
pins = "gpio101";
|
|
function = "QUP0_L0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio101";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
};
|
|
|
|
qupv3_se7_i2c_active_L1_a: qupv3_se7_i2c_active_L1_a {
|
|
mux {
|
|
pins = "gpio102";
|
|
function = "QUP0_L1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio102";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_i2c_sleep_a: qupv3_se7_i2c_sleep_a {
|
|
mux {
|
|
pins = "gpio101", "gpio102";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio101", "gpio102";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_pins_a: qupv3_se7_spi_pins_a {
|
|
qupv3_se7_spi_active_L0_a: qupv3_se7_spi_active_L0_a {
|
|
mux {
|
|
pins = "gpio101";
|
|
function = "QUP0_L0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio101";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_active_L1_a: qupv3_se7_spi_active_L1_a {
|
|
mux {
|
|
pins = "gpio102";
|
|
function = "QUP0_L1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio102";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_active_L2_a: qupv3_se7_spi_active_L2_a {
|
|
mux {
|
|
pins = "gpio104";
|
|
function = "QUP0_L2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio104";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_active_L3_a: qupv3_se7_spi_active_L3_a {
|
|
mux {
|
|
pins = "gpio105";
|
|
function = "QUP0_L3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio105";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_sleep_a: qupv3_se7_spi_sleep_a {
|
|
mux {
|
|
pins = "gpio101", "gpio102",
|
|
"gpio104", "gpio105";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio101", "gpio102",
|
|
"gpio104", "gpio105";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se7_i2c_pins_b: qupv3_se7_i2c_pins_b {
|
|
qupv3_se7_i2c_active_L0_b: qupv3_se7_i2c_active_L0_b {
|
|
mux {
|
|
pins = "gpio104";
|
|
function = "QUP0_L0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio104";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
};
|
|
|
|
qupv3_se7_i2c_active_L1_b: qupv3_se7_i2c_active_L1_b {
|
|
mux {
|
|
pins = "gpio105";
|
|
function = "QUP0_L1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio105";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_i2c_sleep_b: qupv3_se7_i2c_sleep_b {
|
|
mux {
|
|
pins = "gpio104", "gpio105";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio104", "gpio105";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_pins_b: qupv3_se7_spi_pins_b {
|
|
qupv3_se7_spi_active_L0_b: qupv3_se7_spi_active_L0_b {
|
|
mux {
|
|
pins = "gpio104";
|
|
function = "QUP0_L0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio104";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_active_L1_b: qupv3_se7_spi_active_L1_b {
|
|
mux {
|
|
pins = "gpio105";
|
|
function = "QUP0_L1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio105";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_active_L2_b: qupv3_se7_spi_active_L2_b {
|
|
mux {
|
|
pins = "gpio101";
|
|
function = "QUP0_L2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio101";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_active_L3_b: qupv3_se7_spi_active_L3_b {
|
|
mux {
|
|
pins = "gpio102";
|
|
function = "QUP0_L3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio102";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_sleep_b: qupv3_se7_spi_sleep_b {
|
|
mux {
|
|
pins = "gpio104", "gpio105",
|
|
"gpio101", "gpio102";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio104", "gpio105",
|
|
"gpio101", "gpio102";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se5_4uart_pins: qupv3_se5_4uart_pins {
|
|
qupv3_se5_default_ctsrtsrx:
|
|
qupv3_se5_default_ctsrtsrx {
|
|
mux {
|
|
pins = "gpio26", "gpio27", "gpio79";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio26", "gpio27", "gpio79";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_default_tx: qupv3_se5_default_tx {
|
|
mux {
|
|
pins = "gpio28";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio28";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_ctsrx: qupv3_se5_ctsrx {
|
|
mux {
|
|
pins = "gpio26", "gpio79";
|
|
function = "qup05";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio26", "gpio79";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_rts: qupv3_se5_rts {
|
|
mux {
|
|
pins = "gpio27";
|
|
function = "qup05";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio27";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_tx: qupv3_se5_tx {
|
|
mux {
|
|
pins = "gpio28";
|
|
function = "qup05";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio28";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
};
|
|
|
|
/* WSA speaker reset pin1 */
|
|
spkr_1_sd_n {
|
|
spkr_1_sd_n_sleep: spkr_1_sd_n_sleep {
|
|
mux {
|
|
pins = "gpio80";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio80";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
spkr_1_sd_n_active: spkr_1_sd_n_active {
|
|
mux {
|
|
pins = "gpio80";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio80";
|
|
drive-strength = <16>; /* 16 mA */
|
|
bias-disable;
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
cci0_suspend: cci0_suspend {
|
|
mux {
|
|
/* CLK, DATA*/
|
|
pins = "gpio38", "gpio37";
|
|
function = "cci_i2c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio38", "gpio37";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cci0_active: cci0_active {
|
|
mux {
|
|
/* CLK, DATA*/
|
|
pins = "gpio38", "gpio37";
|
|
function = "cci_i2c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio38", "gpio37";
|
|
bias-pull-up; /* PULL UP*/
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cci1_suspend: cci1_suspend {
|
|
mux {
|
|
/* CLK, DATA*/
|
|
pins = "gpio40", "gpio39";
|
|
function = "cci_i2c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40", "gpio39";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cci1_active: cci1_active {
|
|
mux {
|
|
/* CLK, DATA*/
|
|
pins = "gpio40", "gpio39";
|
|
function = "cci_i2c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40", "gpio39";
|
|
bias-pull-up; /* PULL UP*/
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk0_active: cam_sensor_mclk0_active {
|
|
/* MCLK 0*/
|
|
mux {
|
|
pins = "gpio32";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk0_suspend: cam_sensor_mclk0_suspend {
|
|
/* MCLK 0*/
|
|
mux {
|
|
pins = "gpio32";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk1_active: cam_sensor_mclk1_active {
|
|
/* MCLK 1*/
|
|
mux {
|
|
pins = "gpio33";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio33";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk1_suspend: cam_sensor_mclk1_suspend {
|
|
/* MCLK 1*/
|
|
mux {
|
|
pins = "gpio33";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio33";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_rear0_reset_active: cam_sensor_rear0_reset_active {
|
|
/* RESET0 */
|
|
mux {
|
|
pins = "gpio35";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio35";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_rear0_reset_suspend: cam_sensor_rear0_reset_suspend {
|
|
/* RESET0 */
|
|
mux {
|
|
pins = "gpio35";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio35";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
cam_sensor_front0_reset_active: cam_sensor_front0_reset_active {
|
|
/* RESET0 */
|
|
mux {
|
|
pins = "gpio36";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_front0_reset_suspend: cam_sensor_front0_reset_suspend {
|
|
/* RESET0 */
|
|
mux {
|
|
pins = "gpio36";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
/* SDC pin type */
|
|
sdc1_on: sdc1_on {
|
|
clk {
|
|
pins = "sdc1_clk";
|
|
bias-disable;
|
|
drive-strength = <16>;
|
|
};
|
|
|
|
cmd {
|
|
pins = "sdc1_cmd";
|
|
bias-pull-up;
|
|
drive-strength = <10>;
|
|
};
|
|
|
|
data {
|
|
pins = "sdc1_data";
|
|
bias-pull-up;
|
|
drive-strength = <10>;
|
|
};
|
|
|
|
rclk {
|
|
pins = "sdc1_rclk";
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
sdc1_off: sdc1_off {
|
|
clk {
|
|
pins = "sdc1_clk";
|
|
bias-disable;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
cmd {
|
|
pins = "sdc1_cmd";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
data {
|
|
pins = "sdc1_data";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
rclk {
|
|
pins = "sdc1_rclk";
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_sde_te {
|
|
sde_te_active: sde_te_active {
|
|
mux {
|
|
pins = "gpio73";
|
|
function = "mdp_vsync";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio73";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
sde_te_suspend: sde_te_suspend {
|
|
mux {
|
|
pins = "gpio73";
|
|
function = "mdp_vsync";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio73";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
};
|