mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-11-08 11:45:53 -05:00
ef467db970
Fix EP PCIe perst pinctrl settings on sdxlemur. Change-Id: I24872499a73706e9711bcaea37fa38ae15901fa7
1736 lines
28 KiB
Devicetree
1736 lines
28 KiB
Devicetree
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&soc {
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tlmm: pinctrl@f100000 {
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compatible = "qcom,sdxlemur-pinctrl";
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reg = <0xf100000 0x300000>;
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reg-names = "pinctrl";
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interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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interrupt-parent = <&intc>;
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#interrupt-cells = <2>;
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wakeup-parent = <&pdc>;
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uart3_console_active: uart3_console_active {
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mux {
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pins = "gpio8", "gpio9";
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function = "blsp_uart3";
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};
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config {
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pins = "gpio8", "gpio9";
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drive-strength = <2>;
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bias-disable;
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};
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};
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uart3_console_sleep: uart3_console_sleep {
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mux {
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pins = "gpio8", "gpio9";
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function = "blsp_uart3";
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};
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config {
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pins = "gpio8", "gpio9";
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drive-strength = <2>;
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bias-disable;
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};
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};
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sdc1_on: sdc1_on {
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clk {
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pins = "sdc1_clk";
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bias-disable;
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drive-strength = <16>;
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};
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cmd {
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pins = "sdc1_cmd";
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bias-pull-up;
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drive-strength = <16>;
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};
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data {
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pins = "sdc1_data";
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bias-pull-up;
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drive-strength = <16>;
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};
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data_4 {
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pins = "gpio98";
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function = "gpio";
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drive-strength = <12>;
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bias-pull-up;
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};
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data_5 {
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pins = "gpio99";
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function = "gpio";
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drive-strength = <12>;
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bias-pull-up;
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};
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data_6 {
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pins = "gpio100";
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function = "gpio";
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drive-strength = <12>;
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bias-pull-up;
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};
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data_7 {
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pins = "gpio101";
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function = "gpio";
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drive-strength = <12>;
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bias-pull-up;
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};
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};
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sdc1_off: sdc1_off {
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clk {
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pins = "sdc1_clk";
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bias-disable;
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drive-strength = <2>;
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};
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cmd {
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pins = "sdc1_cmd";
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bias-pull-up;
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drive-strength = <2>;
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};
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data {
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pins = "sdc1_data";
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bias-pull-up;
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drive-strength = <2>;
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};
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data_4 {
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pins = "gpio98";
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function = "gpio";
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drive-strength = <2>;
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bias-disable;
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};
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data_5 {
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pins = "gpio99";
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function = "gpio";
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drive-strength = <2>;
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bias-disable;
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};
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data_6 {
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pins = "gpio100";
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function = "gpio";
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drive-strength = <2>;
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bias-disable;
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};
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data_7 {
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pins = "gpio101";
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function = "gpio";
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drive-strength = <2>;
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bias-disable;
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};
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};
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sdc2_on: sdc2_on {
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clk {
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pins = "sdc1_clk";
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bias-disable;
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drive-strength = <16>;
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};
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cmd {
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pins = "sdc1_cmd";
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bias-pull-up;
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drive-strength = <10>;
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};
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data {
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pins = "sdc1_data";
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bias-pull-up;
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drive-strength = <10>;
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};
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sd-cd {
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pins = "gpio99";
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bias-pull-up;
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drive-strength = <2>;
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};
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};
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sdc2_off: sdc2_off {
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clk {
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pins = "sdc1_clk";
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bias-disable;
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drive-strength = <2>;
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};
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cmd {
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pins = "sdc1_cmd";
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bias-pull-up;
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drive-strength = <2>;
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};
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data {
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pins = "sdc1_data";
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bias-pull-up;
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drive-strength = <2>;
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};
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sd-cd {
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pins = "gpio99";
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bias-disable;
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drive-strength = <2>;
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};
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};
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pcie0 {
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pcie0_clkreq_default: pcie0_clkreq_default {
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mux {
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pins = "gpio56";
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function = "pcie_clkreq";
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};
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config {
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pins = "gpio56";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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pcie0_perst_default: pcie0_perst_default {
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mux {
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pins = "gpio57";
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function = "gpio";
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};
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config {
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pins = "gpio57";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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pcie0_wake_default: pcie0_wake_default {
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mux {
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pins = "gpio53";
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function = "gpio";
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};
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config {
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pins = "gpio53";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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pcie0_clkreq_sleep: pcie0_clkreq_sleep {
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mux {
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pins = "gpio56";
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function = "gpio";
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};
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config {
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pins = "gpio56";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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cnss_pins {
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cnss_wlan_en_active: cnss_wlan_en_active {
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mux {
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pins = "gpio91";
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function = "gpio";
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};
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config {
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pins = "gpio91";
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drive-strength = <16>;
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output-high;
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bias-pull-up;
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};
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};
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cnss_wlan_en_sleep: cnss_wlan_en_sleep {
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mux {
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pins = "gpio91";
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function = "gpio";
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};
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config {
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pins = "gpio91";
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drive-strength = <2>;
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output-low;
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bias-pull-down;
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};
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};
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};
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pcie_ep {
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pcie_ep_clkreq_default: pcie_ep_clkreq_default {
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mux {
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pins = "gpio56";
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function = "pcie_clkreq";
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};
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config {
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pins = "gpio56";
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drive-strength = <2>;
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bias-disable;
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};
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};
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pcie_ep_perst_default: pcie_ep_perst_default {
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mux {
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pins = "gpio57";
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function = "gpio";
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};
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config {
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pins = "gpio57";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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pcie_ep_wake_default: pcie_ep_wake_default {
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mux {
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pins = "gpio53";
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function = "gpio";
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};
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config {
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pins = "gpio53";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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i2c_1 {
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i2c_1_active: i2c_1_active {
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mux {
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pins = "gpio2", "gpio3";
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function = "blsp_i2c1";
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};
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config {
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pins = "gpio2", "gpio3";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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i2c_1_sleep: i2c_1_sleep {
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mux {
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pins = "gpio2", "gpio3";
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function = "gpio";
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};
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config {
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pins = "gpio2", "gpio3";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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i2c_2 {
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i2c_2_active: i2c_2_active {
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mux {
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pins = "gpio6", "gpio7";
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function = "blsp_i2c2";
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};
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config {
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pins = "gpio6", "gpio7";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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i2c_2_sleep: i2c_2_sleep {
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mux {
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pins = "gpio6", "gpio7";
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function = "gpio";
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};
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config {
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pins = "gpio6", "gpio7";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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i2c_3 {
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i2c_3_active: i2c_3_active {
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mux {
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pins = "gpio10", "gpio11";
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function = "blsp_i2c3";
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};
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config {
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pins = "gpio10", "gpio11";
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drive-strength = <2>;
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bias-disable;
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};
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};
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i2c_3_sleep: i2c_3_sleep {
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mux {
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pins = "gpio10", "gpio11";
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function = "blsp_i2c3";
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};
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config {
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pins = "gpio10", "gpio11";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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i2c_4 {
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i2c_4_active: i2c_4_active {
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mux {
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pins = "gpio84", "gpio85";
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function = "blsp_i2c4";
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};
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config {
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pins = "gpio84", "gpio85";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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i2c_4_sleep: i2c_4_sleep {
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mux {
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pins = "gpio84", "gpio85";
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function = "gpio";
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};
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config {
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pins = "gpio84", "gpio85";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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i2c_5 {
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i2c_5_active: i2c_5_active {
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mux {
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pins = "gpio82", "gpio83";
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function = "blsp_i2c1";
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};
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config {
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pins = "gpio82", "gpio83";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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i2c_5_sleep: i2c_5_sleep {
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mux {
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pins = "gpio82", "gpio83";
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function = "gpio";
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};
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config {
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pins = "gpio82", "gpio83";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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i2c_6 {
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i2c_6_active: i2c_6_active {
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mux {
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pins = "gpio65", "gpio66";
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function = "blsp_i2c2";
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};
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config {
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pins = "gpio65", "gpio66";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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i2c_6_sleep: i2c_6_sleep {
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mux {
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pins = "gpio65", "gpio66";
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function = "gpio";
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};
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config {
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pins = "gpio65", "gpio66";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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i2c_7 {
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i2c_7_active: i2c_7_active {
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mux {
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pins = "gpio18", "gpio19";
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function = "blsp_i2c4";
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};
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config {
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pins = "gpio18", "gpio19";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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i2c_7_sleep: i2c_7_sleep {
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mux {
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pins = "gpio18", "gpio19";
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function = "gpio";
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};
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config {
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pins = "gpio18", "gpio19";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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spi_1 {
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spi_1_active: spi_1_active {
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mux {
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pins = "gpio80", "gpio81",
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"gpio82", "gpio83";
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function = "blsp_spi1";
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};
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config {
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pins = "gpio80", "gpio81",
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"gpio82", "gpio83";
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drive-strength = <6>;
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bias-disable;
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};
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};
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spi_1_sleep: spi_1_sleep {
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mux {
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pins = "gpio80", "gpio81",
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"gpio82", "gpio83";
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function = "gpio";
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};
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config {
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pins = "gpio80", "gpio81",
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"gpio82", "gpio83";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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spi_2 {
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spi_2_active: spi_2_active {
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mux {
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pins = "gpio4", "gpio5",
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"gpio6", "gpio7";
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function = "blsp_spi2";
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};
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config {
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pins = "gpio4", "gpio5",
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"gpio6", "gpio7";
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drive-strength = <6>;
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bias-disable;
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};
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};
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spi_2_sleep: spi_2_sleep {
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mux {
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pins = "gpio4", "gpio5",
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"gpio6", "gpio7";
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function = "gpio";
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};
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config {
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pins = "gpio4", "gpio5",
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"gpio6", "gpio7";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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spi_3 {
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spi_3_active: spi_3_active {
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mux {
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pins = "gpio8", "gpio9",
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"gpio10", "gpio11";
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function = "blsp_spi3";
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};
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config {
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pins = "gpio8", "gpio9",
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"gpio10", "gpio11";
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drive-strength = <6>;
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bias-disable;
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};
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};
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spi_3_sleep: spi_3_sleep {
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mux {
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pins = "gpio8", "gpio9",
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"gpio10", "gpio11";
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function = "gpio";
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};
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config {
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pins = "gpio8", "gpio9",
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"gpio10", "gpio11";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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spi_4 {
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spi_4_active: spi_4_active {
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mux {
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pins = "gpio16", "gpio17",
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"gpio18", "gpio19";
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function = "blsp_spi4";
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};
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config {
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pins = "gpio16", "gpio17",
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"gpio18", "gpio19";
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drive-strength = <6>;
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bias-disable;
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};
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};
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spi_4_sleep: spi_4_sleep {
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mux {
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pins = "gpio16", "gpio17",
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"gpio18", "gpio19";
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function = "gpio";
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};
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config {
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pins = "gpio16", "gpio17",
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"gpio18", "gpio19";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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blsp1_uart1a: blsp1_uart1a {
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blsp1_uart1a_tx_active: blsp1_uart1a_tx_active {
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mux {
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pins = "gpio0";
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function = "blsp_uart1";
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};
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config {
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pins = "gpio0";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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|
|
blsp1_uart1a_rxcts_active: blsp1_uart1a_rxcts_active {
|
|
mux {
|
|
pins = "gpio1", "gpio2";
|
|
function = "blsp_uart1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio1", "gpio2";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
blsp1_uart1a_rfr_active: blsp1_uart1a_rfr_active {
|
|
mux {
|
|
pins = "gpio3";
|
|
function = "blsp_uart1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio3";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
blsp1_uart1a_tx_sleep: blsp1_uart1a_tx_sleep {
|
|
mux {
|
|
pins = "gpio0";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
blsp1_uart1a_rxcts_sleep: blsp1_uart1a_rxcts_sleep {
|
|
mux {
|
|
pins = "gpio1", "gpio2";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio1", "gpio2";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
blsp1_uart1a_rfr_sleep: blsp1_uart1a_rfr_sleep {
|
|
mux {
|
|
pins = "gpio3";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio3";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
|
|
blsp1_uart1b: blsp1_uart1b {
|
|
blsp1_uart1b_tx_active: blsp1b_uart1_tx_active {
|
|
mux {
|
|
pins = "gpio48";
|
|
function = "blsp_uart1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
blsp1_uart1b_rxcts_active: blsp1b_uart1_rxcts_active {
|
|
mux {
|
|
pins = "gpio49", "gpio80";
|
|
function = "blsp_uart1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio49", "gpio80";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
blsp1_uart1b_rfr_active: blsp1_uart1b_rfr_active {
|
|
mux {
|
|
pins = "gpio81";
|
|
function = "blsp_uart1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio81";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
blsp1_uart1b_tx_sleep: blsp1_uart1b_tx_sleep {
|
|
mux {
|
|
pins = "gpio48";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
blsp1_uart1b_rxcts_sleep: blsp1_uart1b_rxcts_sleep {
|
|
mux {
|
|
pins = "gpio49", "gpio80";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio49", "gpio80";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
blsp1_uart1b_rfr_sleep: blsp1b_uart1_rfr_sleep {
|
|
mux {
|
|
pins = "gpio81";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio81";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
blsp1_uart2a: blsp1_uart2a {
|
|
blsp1_uart2a_tx_active: blsp1_uart2a_tx_active {
|
|
mux {
|
|
pins = "gpio4";
|
|
function = "blsp_uart2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
blsp1_uart2a_rxcts_active: blsp1_uart2a_rxcts_active {
|
|
mux {
|
|
pins = "gpio5", "gpio6";
|
|
function = "blsp_uart2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio5", "gpio6";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
blsp1_uart2a_rfr_active: blsp1_uart2a_rfr_active {
|
|
mux {
|
|
pins = "gpio7";
|
|
function = "blsp_uart2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio7";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
blsp1_uart2a_tx_sleep: blsp1_uart2a_tx_sleep {
|
|
mux {
|
|
pins = "gpio4";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
blsp1_uart2a_rxcts_sleep: blsp1_uart2a_rxcts_sleep {
|
|
mux {
|
|
pins = "gpio5", "gpio6";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio5", "gpio6";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
blsp1_uart2a_rfr_sleep: blsp1_uart2a_rfr_sleep {
|
|
mux {
|
|
pins = "gpio7";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio7";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
blsp1_uart2b: blsp1_uart2b {
|
|
blsp1_uart2b_tx_active: blsp1_uart2b_tx_active {
|
|
mux {
|
|
pins = "gpio63";
|
|
function = "blsp_uart2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio63";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
blsp1_uart2b_rxcts_active: blsp1_uart2b_rxcts_active {
|
|
mux {
|
|
pins = "gpio64", "gpio65";
|
|
function = "blsp_uart2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio64", "gpio65";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
blsp1_uart2b_rfr_active: blsp1_uart2b_rfr_active {
|
|
mux {
|
|
pins = "gpio66";
|
|
function = "blsp_uart2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio66";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
blsp1_uart2b_tx_sleep: blsp1_uart2b_tx_sleep {
|
|
mux {
|
|
pins = "gpio63";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio63";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
blsp1_uart2b_rx_sleep: blsp1_uart2b_rx_sleep {
|
|
mux {
|
|
pins = "gpio64";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio64";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
blsp1_uart2b_cts_sleep: blsp1_uart2b_cts_sleep {
|
|
mux {
|
|
pins = "gpio65";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio65";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
|
|
blsp1_uart2b_rfr_sleep: blsp1_uart2b_rfr_sleep {
|
|
mux {
|
|
pins = "gpio66";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio66";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
output-low;
|
|
};
|
|
};
|
|
};
|
|
|
|
blsp1_uart3: blsp1_uart3 {
|
|
blsp1_uart3_tx_active: blsp1_uart3_tx_active {
|
|
mux {
|
|
pins = "gpio8";
|
|
function = "blsp_uart3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio8";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
blsp1_uart3_rxcts_active: blsp1_uart3_rxcts_active {
|
|
mux {
|
|
pins = "gpio9", "gpio10";
|
|
function = "blsp_uart3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio9", "gpio10";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
blsp1_uart3_rfr_active: blsp1_uart3_rfr_active {
|
|
mux {
|
|
pins = "gpio11";
|
|
function = "blsp_uart3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio11";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
blsp1_uart3_tx_sleep: blsp1_uart3_tx_sleep {
|
|
mux {
|
|
pins = "gpio8";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio8";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
blsp1_uart3_rxcts_sleep: blsp1_uart3_rxcts_sleep {
|
|
mux {
|
|
pins = "gpio9", "gpio10";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio9", "gpio10";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
blsp1_uart3_rfr_sleep: blsp1_uart3_rfr_sleep {
|
|
mux {
|
|
pins = "gpio11";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio11";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
blsp1_uart4a: blsp1_uart4a {
|
|
blsp1_uart4a_tx_active: blsp1_uart4a_tx_active {
|
|
mux {
|
|
pins = "gpio48";
|
|
function = "blsp_uart4";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
blsp1_uart4a_rxcts_active: blsp1_uart4a_rxcts_active {
|
|
mux {
|
|
pins = "gpio49", "gpio22";
|
|
function = "blsp_uart4";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio49", "gpio22";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
blsp1_uart4a_rfr_active: blsp1_uart4a_rfr_active {
|
|
mux {
|
|
pins = "gpio23";
|
|
function = "blsp_uart4";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio23";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
blsp1_uart4a_tx_sleep: blsp1_uart4a_tx_sleep {
|
|
mux {
|
|
pins = "gpio48";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio22";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
blsp1_uart4a_rxcts_sleep: blsp1_uart4a_rxcts_sleep {
|
|
mux {
|
|
pins = "gpio49", "gpio22";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio49", "gpio22";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
blsp1_uart4a_rfr_sleep: blsp1_uart4a_rfr_sleep {
|
|
mux {
|
|
pins = "gpio23";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio23";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
blsp1_uart4b: blsp1_uart4b {
|
|
blsp1_uart4b_tx_active: blsp1_uart4b_tx_active {
|
|
mux {
|
|
pins = "gpio16";
|
|
function = "blsp_uart4";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
blsp1_uart4b_rxcts_active: blsp1_uart4b_rxcts_active {
|
|
mux {
|
|
pins = "gpio17", "gpio18";
|
|
function = "blsp_uart4";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio17", "gpio18";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
blsp1_uart4b_rfr_active: blsp1_uart4b_rfr_active {
|
|
mux {
|
|
pins = "gpio19";
|
|
function = "blsp_uart4";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio19";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
blsp1_uart4b_tx_sleep: blsp1_uart4b_tx_sleep {
|
|
mux {
|
|
pins = "gpio16";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
blsp1_uart4b_rxcts_sleep: blsp1_uart4b_rxcts_sleep {
|
|
mux {
|
|
pins = "gpio17", "gpio18";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio17", "gpio18";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
blsp1_uart4b_rfr_sleep: blsp1_uart4b_rfr_sleep {
|
|
mux {
|
|
pins = "gpio19";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio19";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
qpic_cs_active: qpic_cs_active {
|
|
mux {
|
|
pins = "gpio90";
|
|
function = "ebi2_lcd";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio90";
|
|
drive-strength = <10>; /* 10 mA */
|
|
bias-disable; /* NO pull */
|
|
};
|
|
};
|
|
|
|
qpic_cs_sleep: qpic_cs_sleep {
|
|
mux {
|
|
pins = "gpio90";
|
|
function = "ebi2_lcd";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio90";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-disable; /* NO pull */
|
|
};
|
|
};
|
|
|
|
qpic_te_active: qpic_te_active {
|
|
mux {
|
|
pins = "gpio84";
|
|
function = "ebi2_lcd";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio84";
|
|
drive-strength = <10>; /* 10 mA */
|
|
bias-disable; /* NO pull */
|
|
};
|
|
};
|
|
|
|
qpic_te_sleep: qpic_te_sleep {
|
|
mux {
|
|
pins = "gpio84";
|
|
function = "ebi2_lcd";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio84";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-disable; /* NO pull */
|
|
};
|
|
};
|
|
|
|
qpic_rs_active: qpic_rs_active {
|
|
mux {
|
|
pins = "gpio85";
|
|
function = "ebi2_lcd";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio85";
|
|
drive-strength = <10>; /* 10 mA */
|
|
bias-disable; /* NO pull */
|
|
};
|
|
};
|
|
|
|
qpic_rs_sleep: qpic_rs_sleep {
|
|
mux {
|
|
pins = "gpio85";
|
|
function = "ebi2_lcd";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio85";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-disable; /* NO pull */
|
|
};
|
|
};
|
|
|
|
qpic_ad_active: qpic_ad_active {
|
|
mux {
|
|
pins = "gpio89";
|
|
function = "ebi2_a";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio89";
|
|
drive-strength = <10>; /* 10 mA */
|
|
bias-disable; /* NO pull */
|
|
};
|
|
};
|
|
|
|
qpic_ad_sleep: qpic_ad_sleep {
|
|
mux {
|
|
pins = "gpio89";
|
|
function = "ebi2_a";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio89";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-disable; /* NO pull */
|
|
};
|
|
};
|
|
|
|
qpic_bl_active: qpic_bl_active {
|
|
mux {
|
|
pins = "gpio97";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio97";
|
|
drive-strength = <10>; /* 10 mA */
|
|
bias-disable; /* NO pull */
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
qpic_bl_sleep: qpic_bl_sleep {
|
|
mux {
|
|
pins = "gpio97";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio97";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-disable; /* NO pull */
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
wcd9xxx_intr {
|
|
wcd_intr_default: wcd_intr_default {
|
|
mux {
|
|
pins = "gpio48";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* pull down */
|
|
input-enable;
|
|
};
|
|
};
|
|
};
|
|
|
|
cdc_reset_ctrl {
|
|
cdc_reset_sleep: cdc_reset_sleep {
|
|
mux {
|
|
pins = "gpio49";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio49";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
cdc_reset_active:cdc_reset_active {
|
|
mux {
|
|
pins = "gpio49";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio49";
|
|
drive-strength = <8>;
|
|
bias-pull-down;
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
i2s_mclk {
|
|
i2s_mclk_sleep: i2s_mclk_sleep {
|
|
mux {
|
|
pins = "gpio62";
|
|
function = "i2s_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio62";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
};
|
|
};
|
|
|
|
i2s_mclk_active: i2s_mclk_active {
|
|
mux {
|
|
pins = "gpio62";
|
|
function = "i2s_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio62";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_pri_mi2s_aux {
|
|
pri_ws_sleep: pri_ws_sleep {
|
|
mux {
|
|
pins = "gpio12";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_sck_sleep: pri_sck_sleep {
|
|
mux {
|
|
pins = "gpio15";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio15";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_dout_sleep: pri_dout_sleep {
|
|
mux {
|
|
pins = "gpio14";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio14";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_ws_active_master: pri_ws_active_master {
|
|
mux {
|
|
pins = "gpio12";
|
|
function = "pri_mi2s_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
pri_sck_active_master: pri_sck_active_master {
|
|
mux {
|
|
pins = "gpio15";
|
|
function = "pri_mi2s";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio15";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
pri_ws_active_slave: pri_ws_active_slave {
|
|
mux {
|
|
pins = "gpio12";
|
|
function = "pri_mi2s_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
};
|
|
};
|
|
|
|
pri_sck_active_slave: pri_sck_active_slave {
|
|
mux {
|
|
pins = "gpio15";
|
|
function = "pri_mi2s";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio15";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
};
|
|
};
|
|
|
|
pri_dout_active: pri_dout_active {
|
|
mux {
|
|
pins = "gpio14";
|
|
function = "pri_mi2s";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio14";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_pri_mi2s_aux_din {
|
|
pri_din_sleep: pri_din_sleep {
|
|
mux {
|
|
pins = "gpio13";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio13";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_din_active: pri_din_active {
|
|
mux {
|
|
pins = "gpio13";
|
|
function = "pri_mi2s";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio13";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_sec_mi2s_aux {
|
|
sec_ws_sleep: sec_ws_sleep {
|
|
mux {
|
|
pins = "gpio16";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_sck_sleep: sec_sck_sleep {
|
|
mux {
|
|
pins = "gpio19";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio19";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_dout_sleep: sec_dout_sleep {
|
|
mux {
|
|
pins = "gpio18";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio18";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_ws_active_master: sec_ws_active_master {
|
|
mux {
|
|
pins = "gpio16";
|
|
function = "sec_mi2s";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
sec_sck_active_master: sec_sck_active_master {
|
|
mux {
|
|
pins = "gpio19";
|
|
function = "sec_mi2s";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio19";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
sec_ws_active_slave: sec_ws_active_slave {
|
|
mux {
|
|
pins = "gpio16";
|
|
function = "sec_mi2s";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
};
|
|
};
|
|
|
|
sec_sck_active_slave: sec_sck_active_slave {
|
|
mux {
|
|
pins = "gpio19";
|
|
function = "sec_mi2s";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio19";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
};
|
|
};
|
|
|
|
sec_dout_active: sec_dout_active {
|
|
mux {
|
|
pins = "gpio18";
|
|
function = "sec_mi2s";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio18";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL*/
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_sec_mi2s_aux_din {
|
|
bt_edl_default: sec_din_sleep: sec_din_sleep {
|
|
mux {
|
|
pins = "gpio17";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio17";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-disable; /* NO PULL */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_din_active: sec_din_active {
|
|
mux {
|
|
pins = "gpio17";
|
|
function = "sec_mi2s";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio17";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
qps615_intn_wol {
|
|
aqr_intn_wol_sig: aqr_intn_wol_sig {
|
|
mux {
|
|
pins = "gpio103";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio103";
|
|
input-enable;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
napa_intn_wol_sig: napa_intn_wol_sig {
|
|
mux {
|
|
pins = "gpio81";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio81";
|
|
input-enable;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|