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android_kernel_motorola_sm6375/qcom/sdxlemur-usb.dtsi
David Collins 945ada9cb5 ARM: dts: qcom: reduce L4B regulator min voltage to 880 mV for sdxlemur 
PMX65 LDO 4 (L4B) loads are able to operate successfully with
L4B set to 880 mV.  Therefore, reduce the L4B minimum constraint
voltage to 880 mV.  This allows power to be saved when possible.

Also reduce the minimum voltage voted by USB and PCIe devices to
880 mV to achieve the desired power savings.

Change-Id: Ie9f76e65cac22290e85cfba3b7cf2cea4da3eee3
2021-11-03 16:11:50 -07:00

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9.9 KiB
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#include <dt-bindings/phy/qcom,usb3-5nm-qmp-uni.h>
&soc {
usb: ssusb@a600000 {
compatible = "qcom,dwc-usb3-msm";
reg = <0x0a600000 0x100000>;
reg-names = "core_base";
iommus = <&apps_smmu 0x1a0 0x0>;
qcom,iommu-dma = "atomic";
qcom,iommu-dma-addr-pool = <0x90000000 0x0ffe0000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
dma-ranges;
qcom,iommu-best-fit-algo;
interrupts-extended = <&pdc 19 IRQ_TYPE_EDGE_RISING>,
<&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 76 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 18 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "dp_hs_phy_irq", "pwr_event_irq",
"ss_phy_irq", "dm_hs_phy_irq";
qcom,use-pdc-interrupts;
USB3_GDSC-supply = <&gcc_usb30_gdsc>;
dpdm-supply = <&usb2_phy>;
qcom,usb-charger;
clocks = <&gcc GCC_USB30_MASTER_CLK>,
<&gcc GCC_USB30_SLV_AHB_CLK>,
<&gcc GCC_USB30_MSTR_AXI_CLK>,
<&gcc GCC_USB30_MOCK_UTMI_CLK>,
<&gcc GCC_USB30_SLEEP_CLK>,
<&gcc GCC_USB3_PRIM_CLKREF_EN>;
clock-names = "core_clk", "iface_clk", "bus_aggr_clk",
"utmi_clk", "sleep_clk", "xo";
resets = <&gcc GCC_USB30_BCR>;
reset-names = "core_reset";
qcom,core-clk-rate = <200000000>;
qcom,core-clk-rate-hs = <66666667>;
qcom,num-gsi-evt-buffs = <0x3>;
qcom,gsi-reg-offset =
<0x0fc /* GSI_GENERAL_CFG */
0x208 /* GSI_DBL_ADDR_L */
0x224 /* GSI_DBL_ADDR_H */
0x240 /* GSI_RING_BASE_ADDR_L */
0x25c /* GSI_RING_BASE_ADDR_H */
0x1a4>; /* GSI_IF_STS */
qcom,dwc-usb3-msm-tx-fifo-size = <27696>;
interconnect-names = "usb-ddr", "usb-ipa", "ddr-usb";
interconnects = <&system_noc MASTER_USB3 &mc_virt SLAVE_EBI1>,
<&system_noc MASTER_USB3 &system_noc SLAVE_IPA_CFG>,
<&mem_noc MASTER_APPSS_PROC &system_noc SLAVE_USB3>;
qcom,default-bus-vote = <2>; /* use svs bus voting */
qcom,pm-qos-latency = <44>;
dwc3@a600000 {
compatible = "snps,dwc3";
reg = <0x0a600000 0xcd00>;
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
usb-phy = <&usb2_phy>, <&usb_qmp_phy>;
linux,sysdev_is_parent;
snps,disable-clk-gating;
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x10>;
snps,ssp-u3-u0-quirk;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
snps,bus-suspend-enable;
tx-fifo-resize;
maximum-speed = "super-speed-plus";
dr_mode = "otg";
imod-interval-ns = <1000000>;
};
qcom,usbbam@a704000 {
compatible = "qcom,usb-bam-msm";
reg = <0xa704000 0x17000>;
interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
qcom,usb-bam-fifo-baseaddr = <0x1468b000>;
qcom,usb-bam-num-pipes = <4>;
qcom,disable-clk-gating;
qcom,usb-bam-override-threshold = <0x4001>;
qcom,usb-bam-max-mbps-highspeed = <400>;
qcom,usb-bam-max-mbps-superspeed = <3600>;
qcom,reset-bam-on-connect;
qcom,pipe0 {
label = "ssusb-qdss-in-0";
qcom,usb-bam-mem-type = <2>;
qcom,dir = <1>;
qcom,pipe-num = <0>;
qcom,peer-bam = <0>;
qcom,peer-bam-physical-address = <0x6064000>;
qcom,src-bam-pipe-index = <0>;
qcom,dst-bam-pipe-index = <0>;
qcom,data-fifo-offset = <0x0>;
qcom,data-fifo-size = <0x1800>;
qcom,descriptor-fifo-offset = <0x1800>;
qcom,descriptor-fifo-size = <0x800>;
};
};
};
usb_nop_phy: usb_nop_phy {
compatible = "usb-nop-xceiv";
};
usb2_phy: hsphy@ff4000 {
compatible = "qcom,usb-hsphy-snps-femto";
reg = <0xff4000 0x120>,
<0xff2000 0x4>;
reg-names = "hsusb_phy_base",
"eud_enable_reg";
vdd-supply = <&pmx65_l4>;
qcom,vdd-voltage-level = <0 880000 912000>;
vdda18-supply = <&pmx65_l5>;
vdda33-supply = <&pmx65_l10>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>;
clock-names = "ref_clk_src", "cfg_ahb_clk";
resets = <&gcc GCC_QUSB2PHY_BCR>;
reset-names = "phy_reset";
qcom,no-rext-present;
};
usb_qmp_phy: ssphy@ff6000 {
compatible = "qcom,usb-ssphy-qmp-v2";
reg = <0xff6000 0x2000>,
<0xff628c 0x4>;
reg-names = "qmp_phy_base",
"pcs_clamp_enable_reg";
vdd-supply = <&pmx65_l4>;
qcom,vdd-voltage-level = <0 880000 912000>;
qcom,vdd-max-load-uA = <47900>;
core-supply = <&pmx65_l1>;
qcom,core-max-load-uA = <15000>;
clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
<&gcc GCC_USB3_PHY_PIPE_CLK>,
<&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>;
clock-names = "aux_clk", "pipe_clk", "ref_clk_src",
"cfg_ahb_clk";
resets = <&gcc GCC_USB3_PHY_BCR>,
<&gcc GCC_USB3PHY_PHY_BCR>;
reset-names = "phy_reset", "phy_phy_reset";
qcom,qmp-phy-init-seq =
/* <reg_offset, value, delay> */
<USB3_UNI_QSERDES_COM_SYSCLK_EN_SEL 0x1A 0
USB3_UNI_QSERDES_COM_BIN_VCOCAL_HSCLK_SEL 0x11 0
USB3_UNI_QSERDES_COM_HSCLK_SEL 0x01 0
USB3_UNI_QSERDES_COM_DEC_START_MODE0 0x82 0
USB3_UNI_QSERDES_COM_DIV_FRAC_START1_MODE0 0xAB 0
USB3_UNI_QSERDES_COM_DIV_FRAC_START2_MODE0 0xEA 0
USB3_UNI_QSERDES_COM_DIV_FRAC_START3_MODE0 0x02 0
USB3_UNI_QSERDES_COM_BIN_VCOCAL_CMP_CODE1_MODE0 0xCA 0
USB3_UNI_QSERDES_COM_BIN_VCOCAL_CMP_CODE2_MODE0 0x1E 0
USB3_UNI_QSERDES_COM_CP_CTRL_MODE0 0x06 0
USB3_UNI_QSERDES_COM_PLL_RCTRL_MODE0 0x16 0
USB3_UNI_QSERDES_COM_PLL_CCTRL_MODE0 0x36 0
USB3_UNI_QSERDES_COM_VCO_TUNE1_MODE0 0x24 0
USB3_UNI_QSERDES_COM_LOCK_CMP2_MODE0 0x34 0
USB3_UNI_QSERDES_COM_LOCK_CMP1_MODE0 0x14 0
USB3_UNI_QSERDES_COM_LOCK_CMP_EN 0x04 0
USB3_UNI_QSERDES_COM_SYSCLK_BUF_ENABLE 0x0A 0
USB3_UNI_QSERDES_COM_VCO_TUNE2_MODE1 0x02 0
USB3_UNI_QSERDES_COM_VCO_TUNE1_MODE1 0x24 0
USB3_UNI_QSERDES_COM_CORECLK_DIV_MODE1 0x08 0
USB3_UNI_QSERDES_COM_DEC_START_MODE1 0x82 0
USB3_UNI_QSERDES_COM_DIV_FRAC_START1_MODE1 0xAB 0
USB3_UNI_QSERDES_COM_DIV_FRAC_START2_MODE1 0xEA 0
USB3_UNI_QSERDES_COM_DIV_FRAC_START3_MODE1 0x02 0
USB3_UNI_QSERDES_COM_LOCK_CMP2_MODE1 0x82 0
USB3_UNI_QSERDES_COM_LOCK_CMP1_MODE1 0x34 0
USB3_UNI_QSERDES_COM_CP_CTRL_MODE1 0x06 0
USB3_UNI_QSERDES_COM_PLL_RCTRL_MODE1 0x16 0
USB3_UNI_QSERDES_COM_PLL_CCTRL_MODE1 0x36 0
USB3_UNI_QSERDES_COM_BIN_VCOCAL_CMP_CODE1_MODE1 0xCA 0
USB3_UNI_QSERDES_COM_BIN_VCOCAL_CMP_CODE2_MODE1 0x1E 0
USB3_UNI_QSERDES_COM_SSC_EN_CENTER 0x01 0
USB3_UNI_QSERDES_COM_SSC_PER1 0x31 0
USB3_UNI_QSERDES_COM_SSC_PER2 0x01 0
USB3_UNI_QSERDES_COM_SSC_STEP_SIZE1_MODE1 0xDE 0
USB3_UNI_QSERDES_COM_SSC_STEP_SIZE2_MODE1 0x07 0
USB3_UNI_QSERDES_COM_SSC_STEP_SIZE1_MODE0 0xDE 0
USB3_UNI_QSERDES_COM_SSC_STEP_SIZE2_MODE0 0x07 0
USB3_UNI_QSERDES_COM_VCO_TUNE_MAP 0x02 0
USB3_UNI_QSERDES_RX_RX_MODE_00_HIGH4 0xDB 0
USB3_UNI_QSERDES_RX_RX_MODE_00_HIGH3 0xBD 0
USB3_UNI_QSERDES_RX_RX_MODE_00_HIGH2 0xFF 0
USB3_UNI_QSERDES_RX_RX_MODE_00_HIGH 0x7F 0
USB3_UNI_QSERDES_RX_RX_MODE_00_LOW 0xFF 0
USB3_UNI_QSERDES_RX_RX_MODE_01_HIGH4 0xA9 0
USB3_UNI_QSERDES_RX_RX_MODE_01_HIGH3 0x7B 0
USB3_UNI_QSERDES_RX_RX_MODE_01_HIGH2 0xE4 0
USB3_UNI_QSERDES_RX_RX_MODE_01_HIGH 0x24 0
USB3_UNI_QSERDES_RX_RX_MODE_01_LOW 0x64 0
USB3_UNI_QSERDES_RX_UCDR_PI_CONTROLS 0x99 0
USB3_UNI_QSERDES_RX_UCDR_SB2_THRESH1 0x08 0
USB3_UNI_QSERDES_RX_UCDR_SB2_THRESH2 0x08 0
USB3_UNI_QSERDES_RX_UCDR_SB2_GAIN1 0x00 0
USB3_UNI_QSERDES_RX_UCDR_SB2_GAIN2 0x04 0
USB3_UNI_QSERDES_RX_UCDR_FASTLOCK_FO_GAIN 0x2F 0
USB3_UNI_QSERDES_RX_UCDR_FASTLOCK_COUNT_LOW 0xFF 0
USB3_UNI_QSERDES_RX_UCDR_FASTLOCK_COUNT_HIGH 0x0F 0
USB3_UNI_QSERDES_RX_UCDR_FO_GAIN 0x0A 0
USB3_UNI_QSERDES_RX_VGA_CAL_CNTRL1 0x54 0
USB3_UNI_QSERDES_RX_VGA_CAL_CNTRL2 0x0F 0
USB3_UNI_QSERDES_RX_RX_EQU_ADAPTOR_CNTRL2 0x0F 0
USB3_UNI_QSERDES_RX_RX_EQU_ADAPTOR_CNTRL4 0x0A 0
USB3_UNI_QSERDES_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x47 0
USB3_UNI_QSERDES_RX_RX_OFFSET_ADAPTOR_CNTRL2 0x80 0
USB3_UNI_QSERDES_RX_SIGDET_CNTRL 0x04 0
USB3_UNI_QSERDES_RX_SIGDET_DEGLITCH_CNTRL 0x0E 0
USB3_UNI_QSERDES_RX_DFE_CTLE_POST_CAL_OFFSET 0x38 0
USB3_UNI_QSERDES_RX_UCDR_SO_GAIN 0x05 0
USB3_UNI_QSERDES_RX_GM_CAL 0x00 0
USB3_UNI_QSERDES_RX_SIGDET_ENABLES 0x00 0
USB3_UNI_QSERDES_TX_LANE_MODE_1 0xA5 0
USB3_UNI_QSERDES_TX_LANE_MODE_2 0x82 0
USB3_UNI_QSERDES_TX_LANE_MODE_3 0x3F 0
USB3_UNI_QSERDES_TX_LANE_MODE_4 0x3F 0
USB3_UNI_QSERDES_TX_PI_QEC_CTRL 0x21 0
USB3_UNI_QSERDES_TX_RES_CODE_LANE_OFFSET_TX 0x1F 0
USB3_UNI_QSERDES_TX_RES_CODE_LANE_OFFSET_RX 0x0B 0
USB3_UNI_PCS_LOCK_DETECT_CONFIG1 0xD0 0
USB3_UNI_PCS_LOCK_DETECT_CONFIG2 0x07 0
USB3_UNI_PCS_LOCK_DETECT_CONFIG3 0x20 0
USB3_UNI_PCS_LOCK_DETECT_CONFIG6 0x13 0
USB3_UNI_PCS_RCVR_DTCT_DLY_P1U2_L 0xE7 0
USB3_UNI_PCS_RCVR_DTCT_DLY_P1U2_H 0x03 0
USB3_UNI_PCS_RX_SIGDET_LVL 0xAA 0
USB3_UNI_PCS_PCS_TX_RX_CONFIG 0x0C 0
USB3_UNI_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x07 0
USB3_UNI_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0xF8 0
USB3_UNI_PCS_CDR_RESET_TIME 0x0A 0
USB3_UNI_PCS_ALIGN_DETECT_CONFIG1 0x88 0
USB3_UNI_PCS_ALIGN_DETECT_CONFIG2 0x13 0
USB3_UNI_PCS_EQ_CONFIG1 0x4B 0
USB3_UNI_PCS_EQ_CONFIG5 0x10 0
USB3_UNI_PCS_REFGEN_REQ_CONFIG1 0x21 0
0xffffffff 0xffffffff 0x00>;
qcom,qmp-phy-reg-offset =
<USB3_UNI_PCS_PCS_STATUS1
USB3_UNI_PCS_USB3_AUTONOMOUS_MODE_CTRL
USB3_UNI_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR
USB3_UNI_PCS_POWER_DOWN_CONTROL
USB3_UNI_PCS_SW_RESET
USB3_UNI_PCS_START_CONTROL>;
};
};
/ {
qcom_gadget {
compatible = "qcom,usb-gadget";
qcom,vid = <0x05c6>;
composition1 {
qcom,pid = <0x9057>;
qcom,composition = "gsi.rndis|gsi.ecm";
};
composition2 {
qcom,pid = <0x905b>;
qcom,composition = "gsi.mbim";
qcom,bmAttributes = <0xa0>;
};
composition3 {
qcom,pid = <0x9063>;
qcom,composition = "gsi.rndis|gsi.ecm|gsi.mbim";
qcom,bmAttributes = <0xa0>;
};
composition4 {
qcom,pid = <0x9067>;
qcom,composition = "mass_storage.0,gsi.rmnet|mass_storage.1,gsi.mbim";
qcom,bmAttributes = <0xa0>;
};
composition5 {
qcom,pid = <0x90b1>;
qcom,composition = "gsi.ecm";
qcom,bmAttributes = <0xa0>;
};
composition6 {
qcom,pid = <0x90e2>;
qcom,composition = "gsi.mbim,gsi.gps";
qcom,bmAttributes = <0xa0>;
};
composition7 {
qcom,pid = <0xf000>;
qcom,composition = "mass_storage.0";
};
};
};
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