Repository files (latest commit first)

Filename	Latest commit message	Latest commit date
Guy Levi 7a0c8f4244 IB/mlx5: Support padded 128B CQE feature ... In some benchmarks and some CPU architectures, writing the CQE on a full cache line size improves performance by saving memory access operations (read-modify-write) relative to partial cache line change. This patch lets the user to configure the device to pad the CQE up to 128B in case its content is less than 128B. Currently the driver supports only padding for a CQE size of 128B. Signed-off-by: Guy Levi <guyle@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Leon Romanovsky <leon@kernel.org> Signed-off-by: Doug Ledford <dledford@redhat.com>		2017-10-25 14:17:06 -04:00
..
asm-generic	Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiederm/user-namespace	2017-09-11 18:34:47 -07:00
drm
linux	- A stable fix for the alignment of the event number reported at the	2017-10-05 15:17:40 -07:00
misc
mtd
rdma	IB/mlx5: Support padded 128B CQE feature	2017-10-25 14:17:06 -04:00
scsi
sound
video
xen