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Filename Latest commit message Latest commit date
Conor Dooley 8ad8fc82ee riscv: topology: fix default topology reporting 
commit fbd92809997a391f28075f1c8b5ee314c225557c upstream.

RISC-V has no sane defaults to fall back on where there is no cpu-map
in the devicetree.
Without sane defaults, the package, core and thread IDs are all set to
-1. This causes user-visible inaccuracies for tools like hwloc/lstopo
which rely on the sysfs cpu topology files to detect a system's
topology.

On a PolarFire SoC, which should have 4 harts with a thread each,
lstopo currently reports:

Machine (793MB total)
  Package L#0
    NUMANode L#0 (P#0 793MB)
    Core L#0
      L1d L#0 (32KB) + L1i L#0 (32KB) + PU L#0 (P#0)
      L1d L#1 (32KB) + L1i L#1 (32KB) + PU L#1 (P#1)
      L1d L#2 (32KB) + L1i L#2 (32KB) + PU L#2 (P#2)
      L1d L#3 (32KB) + L1i L#3 (32KB) + PU L#3 (P#3)

Adding calls to store_cpu_topology() in {boot,smp} hart bringup code
results in the correct topolgy being reported:

Machine (793MB total)
  Package L#0
    NUMANode L#0 (P#0 793MB)
    L1d L#0 (32KB) + L1i L#0 (32KB) + Core L#0 + PU L#0 (P#0)
    L1d L#1 (32KB) + L1i L#1 (32KB) + Core L#1 + PU L#1 (P#1)
    L1d L#2 (32KB) + L1i L#2 (32KB) + Core L#2 + PU L#2 (P#2)
    L1d L#3 (32KB) + L1i L#3 (32KB) + Core L#3 + PU L#3 (P#3)

CC: stable@vger.kernel.org # 456797da792f: arm64: topology: move store_cpu_topology() to shared code
Fixes: 03f11f03db ("RISC-V: Parse cpu topology during boot.")
Reported-by: Brice Goglin <Brice.Goglin@inria.fr>
Link: https://github.com/open-mpi/hwloc/issues/536
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-10-29 10:20:36 +02:00
..
alpha tty: the rest, stop using tty_schedule_flip() 2022-07-29 17:14:19 +02:00
arc
arm ARM: dts: imx6sx: add missing properties for sram 2022-10-26 13:22:55 +02:00
arm64 arm64: topology: move store_cpu_topology() to shared code 2022-10-29 10:20:36 +02:00
c6x
csky
h8300
hexagon
ia64 ia64, processor: fix -Wincompatible-pointer-types in ia64_get_irr() 2022-08-25 11:17:25 +02:00
m68k m68k: use fallback for random_get_entropy() instead of zero 2022-06-22 14:11:15 +02:00
microblaze
mips MIPS: BCM47XX: Cast memcmp() of function to (void *) 2022-10-26 13:22:47 +02:00
nds32
nios2 nios2: add force_successful_syscall_return() 2022-08-25 11:18:28 +02:00
openrisc
parisc parisc: Add runtime check to prevent PA2.0 kernels on PA1.x machines 2022-09-15 12:04:54 +02:00
powerpc powerpc: Fix SPE Power ISA properties for e500v1 platforms 2022-10-26 13:22:45 +02:00
riscv riscv: topology: fix default topology reporting 2022-10-29 10:20:36 +02:00
s390 s390: fix nospec table alignments 2022-09-15 12:04:52 +02:00
sh sh: machvec: Use char[] for section boundaries 2022-10-26 13:22:21 +02:00
sparc sparc: use fallback for random_get_entropy() instead of zero 2022-06-22 14:11:15 +02:00
um UM: cpuinfo: Fix a warning for CONFIG_CPUMASK_OFFSTACK 2022-10-26 13:22:16 +02:00
unicore32
x86 x86/microcode/AMD: Apply the patch early on every logical thread 2022-10-29 10:20:34 +02:00
xtensa xtensa: Fix refcount leak bug in time.c 2022-06-29 08:58:48 +02:00
.gitignore
Kconfig locking/refcount: Consolidate implementations of refcount_t 2022-07-29 17:14:17 +02:00