Repository files (latest commit first)

Filename	Latest commit message	Latest commit date
Thor Thayer 8e5470c983 serial: 8250: Set Altera 16550 TX FIFO Threshold ... The Altera 16550 soft IP UART requires 2 additional registers for TX FIFO threshold support. These 2 registers enable the TX FIFO Low Watermark and set the TX FIFO Low Watermark. Set the TX FIFO threshold to the FIFO size - tx_loadsz. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2016-09-27 12:55:50 +02:00
..
asm-generic
drm	Merge tag 'topic/drm-misc-2016-07-22' of git://anongit.freedesktop.org/drm-intel into drm-next	2016-07-27 10:33:08 +10:00
linux	serial: 8250: Set Altera 16550 TX FIFO Threshold	2016-09-27 12:55:50 +02:00
misc	cxl: Use fixed width predefined types in data structure.	2016-08-09 16:52:01 +10:00
mtd
rdma	Second round of merge items for 4.8	2016-08-04 20:26:31 -04:00
scsi
sound
video
xen	xen/evtchn: add IOCTL_EVTCHN_RESTRICT	2016-07-25 10:59:31 +01:00
Kbuild