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Filename Latest commit message Latest commit date
sganda 923377a3ab ARM: dts: msm: Change QSEE,glink IRQs to level trigger
Change the IRQ handlers from EDGE to level trigger
to prevent missing rapid IRQs from SPU.

Change-Id: I1b0a862edf26ca2540591ba866adb6498dd51b43
2021-01-15 19:18:58 +05:30
bindings Merge "ARM: dts: msm: Add support for ddr scaling on sdxlemur" 2021-01-15 02:01:43 -08:00
qcom ARM: dts: msm: Change QSEE,glink IRQs to level trigger 2021-01-15 19:18:58 +05:30
Makefile ARM: dts: vendor: Add an initial Makefile to the vendor 2019-06-04 16:50:48 -07:00