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Filename Latest commit message Latest commit date
Laxminath Kasam 990c70b004 soc: swr-mstr: Update hparams for all swr master ports
Need to specify hstart and hstop bit fields
even if those are not used in frameshape for
given port. Soundwire master register config
needs to set as 0x0, 0xF for hstart and hstop
for those ports.

CRs-Fixed: 2333434
Change-Id: I78e103a3d4c9085ea14884691d5df3f35fa7a754
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2018-11-13 23:44:23 +05:30
asoc asoc: codecs: bolero: Add HPH power modes on bolero 2018-11-12 20:19:57 +05:30
config msm: featurize support for 32channels from QDSP6 2018-10-12 13:12:29 +05:30
dsp dsp: fix issue with MDF shared memory access in CDSP for QCS403 2018-11-06 18:03:46 +05:30
include Merge "dsp: fix issue with MDF shared memory access in QCS403" 2018-11-05 21:39:00 -08:00
ipc Initial Android target definition for trinket. 2018-10-31 02:40:21 -07:00
soc soc: swr-mstr: Update hparams for all swr master ports 2018-11-13 23:44:23 +05:30
Android.mk Initial Android target definition for trinket. 2018-10-31 02:40:21 -07:00
Makefile ASoC: Add support for audio drivers compilation on kernel-4.14 2018-06-19 03:43:54 +05:30
Makefile.am asoc: codecs: codec driver support for ep92 HDMI bridge 2018-07-27 19:16:38 +05:30
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