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Bojun Pan a2f95e6aab msm: gsi: cache last 20 gsi interrupt for interrupt storm debug
GSI interrupt storm can happen due to un-clocked gsi isr.
If we enable clock and assert, there is a chance the gsi isr will
be already handled.
To debug it further, the change is to cache last 20 gsi isr with
timestamp.

Change-Id: I30be03a20df9f11be7f5d8c06b049591305940bb
Signed-off-by: Bojun Pan <bojunp@codeaurora.org>
2020-07-15 16:42:05 -07:00
config Enable IPA and GSI driver compilation on techapck for holi target 2020-04-18 01:42:20 +05:30
drivers/platform/msm msm: gsi: cache last 20 gsi interrupt for interrupt storm debug 2020-07-15 16:42:05 -07:00
Makefile Enable IPA and GSI driver compilation on techapck 2020-02-24 16:18:32 +02:00