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Filename	Latest commit message	Latest commit date
Aditya Bavanari adca57d6a0 asoc: codecs: Do not update VA clk muxsel register ... Because of a HW limitation in DSP, while switching RCG from TX MCLK to VA MCLK for SVA use cases a glitch is seen on AHB bus leading to data corruption in registers. So, while doing a mux switch for VA RCG clock selection, do not configure the muxsel register in HLOS as it is taken care in DSP itself as a workaround for HW limitation. Change-Id: Iccbe714397796259fa55f9852ece387e949b12e8 Signed-off-by: Aditya Bavanari <abavanar@codeaurora.org> Signed-off-by: Vignesh Kulothungan <vigneshk@codeaurora.org>		2020-02-21 11:09:31 -08:00
asoc	asoc: codecs: Do not update VA clk muxsel register	2020-02-21 11:09:31 -08:00
config	config: Enable swr dmic config	2020-01-10 08:43:47 -08:00
dsp	Merge "dsp: Add afe_close in locked context"	2020-02-17 02:58:03 -08:00
include	soc: soundwire: Update bus clock frequency based on usecase	2020-02-15 00:32:43 +05:30
ipc
soc	Merge "soc: soundwire: Update bus clock frequency based on usecase"	2020-02-20 22:11:07 -08:00
Makefile	audio: enable audio compilation for lahaina	2020-01-08 13:42:21 -08:00
Makefile.am	dsp: update kernel version and uapi path	2019-12-27 10:58:18 -08:00
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