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Filename Latest commit message Latest commit date
Mahadevan ae98505aae disp: msm: sde: switch rsc state before CTL_PREPARE in dual display
In dual display usecase when both displays comes out of
idle following scenario will cause wr_ptr timeout.

 1. Both displays goes to idle and RSCC enters Mode-2.
 2. Primary display exit idle upon DRM commit N RSC
    enters Solver State.
 3. Secondary display exits idle upon DRM commit M and
    waits on input fence after CTL_1_PREPARE is set.
    RSC is still in CMD state.
 4. Primary Commit N frame transfer got successful and
    commit N+1 is queued in primary display when RSC
    in solver state which leads to timeout in primary.

This is because RSCC will not generate a wakeup in sync with
primary timelines leading to timeout. This is because RSCC
still sees idle low thinking frame transfer is taking long
time. This change will switch the rsc state to AMC mode
before CTL_PREPARE is set which resolves such issue.

Change-Id: Ic32e48b4febbbcc54d94876194d38fe6ef3d0981
Signed-off-by: Mahadevan <mahap@codeaurora.org>
2021-09-22 10:03:27 +05:30
config Merge "disp: msm: sde: enable rotator in gki config for holi" 2021-06-03 15:41:13 -07:00
hdcp disp: msm: make msm_drm as module for GKI 2020-04-28 15:52:49 -07:00
include disp: msm: parse SPMI registers and append to IO lend list 2020-08-17 09:47:28 -07:00
msm disp: msm: sde: switch rsc state before CTL_PREPARE in dual display 2021-09-22 10:03:27 +05:30
rotator disp: rotator: add rev checks for rotator for blair target 2021-05-21 12:13:30 +05:30
Android.bp display: get unifdef explicitly 2021-04-02 12:26:40 +05:30
display_kernel_headers.py display: get unifdef explicitly 2021-04-02 12:26:40 +05:30
Makefile makefile: add monaco config for display techpack 2021-05-21 01:29:16 -07:00
NOTICE Display drivers kernel project initial snapshot 2019-04-14 22:20:59 -07:00