Jon Hunter
2956994168
clk: tegra: Add the APB2APE audio clock on Tegra210
...
The APB2APE clock for the audio subsystem is required for powering up the
audio power domain and accessing the various modules in this subsystem on
Tegra210 devices. Add this clock for Tegra210.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-02-02 15:49:29 +01:00
..
arm
clk
clock
clk: tegra: Add the APB2APE audio clock on Tegra210
2016-02-02 15:49:29 +01:00
dma
devicetree: Add bindings documentation for Analog Devices AXI-DMAC
2015-08-23 18:55:10 +05:30
gpio
gpio: add DT bindings for existing consumer flags
2015-10-02 04:25:53 -07:00
i2c
dt-bindings: add header for generic I2C flags in bindings
2015-08-24 14:05:09 +02:00
iio
input
devicetree: bindings: Use linux-event-codes.h for evdev codes
2015-10-16 15:32:15 -07:00
interrupt-controller
leds
dt-bindings: fixes some incorrect header guards
2015-12-08 15:06:54 +01:00
media
memory
mfd
dt-bindings: fixes some incorrect header guards
2015-12-08 15:06:54 +01:00
net
phy
pinctrl
Add minimal device tree support for dra62x also known j5eco. It is
2015-12-31 16:25:22 +01:00
power
ARM: bcm2835: add rpi power domain driver
2015-12-21 20:00:41 -08:00
pwm
regulator
reset
ARM: SoC driver updates for v4.5
2016-01-20 18:42:30 -08:00
soc
sound
spmi
thermal