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Per HW team's analysis, we find a TXDMA HW limitation: ADDR0&0x1FFFFFFF8 should not equal ADDR1&0x1FFFFFFF8. Otherwise, TXDMA will run into exception, which cause TX fail. ADDR0: the address of last words in previous buffer; ADDR1: the address of first words in next buffer; We hit this limitation in NAT forward TSO jumbo case whose buffer address of two fragments like below: tso_frags = ( (length = 0x42, vaddr = 0xFFFFFFD0F5FA2F82, paddr = 0x1F5FA2F82), (length = 0x05A8, vaddr = 0xFFFFFFD0F5FA2FC4, paddr = 0x1F5FA2FC4) In this case, ADDR0 = 0x1F5FA2F82 + 0x42 -2 = 0x1F5FA2FC2, ADDR1 = 0x1F5FA2FC4, then ADDR0&0x1FFFFFFF8 = ADDR1&0x1FFFFFFF8. To avoid this, shift server bytes for ADDR0. Change-Id: If9334a6861a03432eb70356df41a11ad971159e3 CRs-Fixed: 2641066 |
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