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| Filename | Latest commit message | Latest commit date |
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e60959b052
This change moves the backlight update operation from drm bridge enable to connector post kickoff. When timing engine is enabled with programmable fetch enabled, the timing engine will start counting from the prog_fetch_start point (which is somewhere in VFP). It’s a grey area from that point to the actual panel vsync and SW should not trigger DMA command during that time. During display resume, sometimes the INTF timing engine do not get enabled completely at the first vblank irq. The backlight update cmd transfer trigger as part of the drm bridge enable can also take place at the same time, that may cause DSI cmd transfer failure. Change-Id: I2722d3c23012ef0e7bcc7f728ec5658318ce4e60 Signed-off-by: Rajeev Nandan <rajeevny@codeaurora.org> |
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