mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-24 13:44:26 -04:00
61962589a7
Add an SPMI PMIC arbiter device so that it is possible to communicate with PMICs attached to the SPMI bus and also add top level slave devices and their peripherals. Change-Id: If999da320e3212e787af6d22ceed562b808cf690
364 lines
7.9 KiB
Devicetree
364 lines
7.9 KiB
Devicetree
#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/iio/qcom,spmi-vadc.h>
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#include <dt-bindings/input/qcom,qpnp-power-on.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/spmi/spmi.h>
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&spmi_bus {
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#address-cells = <2>;
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#size-cells = <0>;
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interrupt-controller;
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#interrupt-cells = <4>;
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qcom,pm8540@0 {
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compatible = "qcom,spmi-pmic";
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reg = <0 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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pm8540_1_tz: qcom,temp-alarm@2400 {
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compatible = "qcom,spmi-temp-alarm";
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reg = <0x2400>;
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interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
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io-channels = <&pm8540_1_vadc ADC5_DIE_TEMP>;
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io-channel-names = "thermal";
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#thermal-sensor-cells = <0>;
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};
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pm8540_1_vadc: vadc@3100 {
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compatible = "qcom,spmi-adc5";
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reg = <0x3100>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "eoc-int-en-set";
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#io-channel-cells = <1>;
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io-channel-ranges;
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/* Channel node */
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ref_gnd {
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reg = <ADC5_REF_GND>;
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label = "ref_gnd";
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qcom,pre-scaling = <1 1>;
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};
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vref_1p25 {
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reg = <ADC5_1P25VREF>;
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label = "vref_1p25";
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qcom,pre-scaling = <1 1>;
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};
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die_temp {
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reg = <ADC5_DIE_TEMP>;
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label = "die_temp";
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qcom,pre-scaling = <1 1>;
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};
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};
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qcom,power-on@800 {
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compatible = "qcom,qpnp-power-on";
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reg = <0x800>;
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interrupts = <0x0 0x8 0x0 IRQ_TYPE_NONE>,
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<0x0 0x8 0x1 IRQ_TYPE_NONE>;
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interrupt-names = "kpdpwr", "resin";
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qcom,pon-dbc-delay = <15625>;
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qcom,kpdpwr-sw-debounce;
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qcom,system-reset;
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qcom,store-hard-reset-reason;
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qcom,pon_1 {
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qcom,pon-type = <PON_POWER_ON_TYPE_KPDPWR>;
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qcom,pull-up;
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linux,code = <KEY_POWER>;
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};
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qcom,pon_2 {
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qcom,pon-type = <PON_POWER_ON_TYPE_RESIN>;
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qcom,pull-up;
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linux,code = <KEY_VOLUMEDOWN>;
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};
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};
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pm8540_1_clkdiv: clock-controller@5b00 {
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compatible = "qcom,spmi-clkdiv";
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reg = <0x5b00>;
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#clock-cells = <1>;
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qcom,num-clkdivs = <2>;
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clock-output-names = "pm8540_1_div_clk1",
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"pm8540_1_div_clk2";
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "xo";
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};
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pm8540_1_rtc: qcom,pm8540_1_rtc {
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compatible = "qcom,pm8941-rtc";
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reg = <0x6000>, <0x6100>;
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reg-names = "rtc", "alarm";
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interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
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};
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pm8540_1_gpios: pinctrl@c000 {
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compatible = "qcom,pm8150-gpio";
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reg = <0xc000>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pm8540_1_sdam_2: sdam@b100 {
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compatible = "qcom,spmi-sdam";
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reg = <0xb100>;
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};
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};
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qcom,pm8540@1 {
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compatible ="qcom,spmi-pmic";
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reg = <1 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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/* below definitions are for the second instance of pm8540 */
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qcom,pm8540@4 {
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compatible = "qcom,spmi-pmic";
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reg = <4 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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pm8540_2_tz: qcom,temp-alarm@2400 {
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compatible = "qcom,spmi-temp-alarm";
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reg = <0x2400>;
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interrupts = <0x4 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
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io-channels = <&pm8540_2_vadc ADC5_DIE_TEMP>;
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io-channel-names = "thermal";
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#thermal-sensor-cells = <0>;
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};
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pm8540_2_vadc: vadc@3100 {
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compatible = "qcom,spmi-adc5";
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reg = <0x3100>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <0x4 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "eoc-int-en-set";
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#io-channel-cells = <1>;
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io-channel-ranges;
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/* Channel node */
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ref_gnd {
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reg = <ADC5_REF_GND>;
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label = "ref_gnd";
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qcom,pre-scaling = <1 1>;
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};
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vref_1p25 {
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reg = <ADC5_1P25VREF>;
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label = "vref_1p25";
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qcom,pre-scaling = <1 1>;
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};
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die_temp {
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reg = <ADC5_DIE_TEMP>;
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label = "die_temp";
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qcom,pre-scaling = <1 1>;
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};
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};
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qcom,power-on@800 {
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compatible = "qcom,qpnp-power-on";
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reg = <0x800>;
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};
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pm8540_2_clkdiv: clock-controller@5b00 {
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compatible = "qcom,spmi-clkdiv";
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reg = <0x5b00>;
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#clock-cells = <1>;
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qcom,num-clkdivs = <2>;
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clock-output-names = "pm8540_2_div_clk1",
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"pm8540_2_div_clk2";
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "xo";
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status = "disabled";
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};
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pm8540_2_gpios: pinctrl@c000 {
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compatible = "qcom,pm8150-gpio";
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reg = <0xc000>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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qcom,pm8540@5 {
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compatible ="qcom,spmi-pmic";
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reg = <5 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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/* below definitions are for the third instance of pm8540 */
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qcom,pm8540@8 {
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compatible = "qcom,spmi-pmic";
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reg = <8 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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pm8540_3_tz: qcom,temp-alarm@2400 {
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compatible = "qcom,spmi-temp-alarm";
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reg = <0x2400>;
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interrupts = <0x8 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
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io-channels = <&pm8540_3_vadc ADC5_DIE_TEMP>;
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io-channel-names = "thermal";
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#thermal-sensor-cells = <0>;
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};
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pm8540_3_vadc: vadc@3100 {
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compatible = "qcom,spmi-adc5";
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reg = <0x3100>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <0x8 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "eoc-int-en-set";
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#io-channel-cells = <1>;
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io-channel-ranges;
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/* Channel node */
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ref_gnd {
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reg = <ADC5_REF_GND>;
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label = "ref_gnd";
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qcom,pre-scaling = <1 1>;
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};
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vref_1p25 {
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reg = <ADC5_1P25VREF>;
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label = "vref_1p25";
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qcom,pre-scaling = <1 1>;
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};
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die_temp {
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reg = <ADC5_DIE_TEMP>;
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label = "die_temp";
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qcom,pre-scaling = <1 1>;
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};
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};
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qcom,power-on@800 {
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compatible = "qcom,qpnp-power-on";
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reg = <0x800>;
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};
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pm8540_3_clkdiv: clock-controller@5b00 {
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compatible = "qcom,spmi-clkdiv";
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reg = <0x5b00>;
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#clock-cells = <1>;
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qcom,num-clkdivs = <2>;
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clock-output-names = "pm8540_3_div_clk1",
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"pm8540_3_div_clk2";
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "xo";
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status = "disabled";
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};
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pm8540_3_gpios: pinctrl@c000 {
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compatible = "qcom,pm8150-gpio";
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reg = <0xc000>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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qcom,pm8540@9 {
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compatible ="qcom,spmi-pmic";
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reg = <9 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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/* below definitions are for the forth instance of pm8540 */
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qcom,pm8540@C {
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compatible = "qcom,spmi-pmic";
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reg = <12 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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pm8540_4_tz: qcom,temp-alarm@2400 {
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compatible = "qcom,spmi-temp-alarm";
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reg = <0x2400>;
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interrupts = <0xC 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
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io-channels = <&pm8540_4_vadc ADC5_DIE_TEMP>;
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io-channel-names = "thermal";
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#thermal-sensor-cells = <0>;
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};
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pm8540_4_vadc: vadc@3100 {
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compatible = "qcom,spmi-adc5";
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reg = <0x3100>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <0xC 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "eoc-int-en-set";
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#io-channel-cells = <1>;
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io-channel-ranges;
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/* Channel node */
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ref_gnd {
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reg = <ADC5_REF_GND>;
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label = "ref_gnd";
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qcom,pre-scaling = <1 1>;
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};
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vref_1p25 {
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reg = <ADC5_1P25VREF>;
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label = "vref_1p25";
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qcom,pre-scaling = <1 1>;
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};
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die_temp {
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reg = <ADC5_DIE_TEMP>;
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label = "die_temp";
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qcom,pre-scaling = <1 1>;
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};
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};
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qcom,power-on@800 {
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compatible = "qcom,qpnp-power-on";
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reg = <0x800>;
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};
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pm8540_4_clkdiv: clock-controller@5b00 {
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compatible = "qcom,spmi-clkdiv";
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reg = <0x5b00>;
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#clock-cells = <1>;
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qcom,num-clkdivs = <2>;
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clock-output-names = "pm8540_4_div_clk1",
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"pm8540_4_div_clk2";
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "xo";
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status = "disabled";
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};
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pm8540_4_gpios: pinctrl@c000 {
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compatible = "qcom,pm8150-gpio";
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reg = <0xc000>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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qcom,pm8540@D {
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compatible ="qcom,spmi-pmic";
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reg = <13 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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