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The clock and data lanes have a calibration circuitry feature. To offset the drive strength from the calibrated value in an increasing or decreasing manner, use 6 bit two’s complement values. LCD desense has 1.2-1.5dB improve Change-Id: I2c096604941f79b3ec31aa69afc5e1481652f03b Signed-off-by: houdz1 <houdz1@lenovo.com> Reviewed-on: https://gerrit.mot.com/1850390 SLTApproved: Slta Waiver SME-Granted: SME Approvals Granted Tested-by: Jira Key Reviewed-by: Yeqing Wang <wangyq13@motorola.com> Reviewed-by: Huosheng Liao <liaohs@motorola.com> Submit-Approved: Jira Key |
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