A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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android_kernel_motorola_sm6375/drivers/gpu
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Filename Latest commit message Latest commit date
Keith Packard fb0f8fbf97 drm/i915: Generate 2MHz clock for display port aux channel I/O. Retry I/O. 
The display port aux channel clock is taken from the hrawclk value, which is
provided to the chip as the FSB frequency (as far as I can determine). The
strapping values for that are available in the CLKCFG register, now used to
select an appropriate divider to generate a 2MHz clock.

In addition, the DisplayPort spec requires that each aux channel I/O be
retried 'at least 3 times' in case the sink is idle when the first request
comes in.

Signed-off-by: Keith Packard <keithp@keithp.com>
2009-06-18 15:54:14 -07:00
..
drm drm/i915: Generate 2MHz clock for display port aux channel I/O. Retry I/O. 2009-06-18 15:54:14 -07:00
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