mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-29 03:01:39 -04:00
40526282ad
PMIC PM8008 LDOs do not support low power mode (LPM). If configured for LPM, these LDOs continue to operate in normal power mode (NPM) with the same quiescent current but a reduced over-current protection (OCP) threshold, which can result in OCP triggering. Fix all PM8008 LDOs to use normal power mode (NPM) alone to avoid this. Change-Id: I2c8961eaba0677768da09aeba577a32810c1d50f
488 lines
11 KiB
Devicetree
488 lines
11 KiB
Devicetree
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
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#include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h>
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#include "pmk8350.dtsi"
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#include "pm7325.dtsi"
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#include "pm8350c.dtsi"
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#include "pmr735a.dtsi"
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&pm7325_gpios {
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key_vol_up {
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key_vol_up_default: key_vol_up_default {
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pins = "gpio6";
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function = "normal";
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input-enable;
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bias-pull-up;
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power-source = <1>;
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};
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};
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};
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&pm8350c_gpios {
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pm8008i_reset {
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pm8008i_active: pm8008i_active {
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pins = "gpio3";
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function = "normal";
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bias-disable;
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output-high;
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power-source = <0>;
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};
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};
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pm8008j_reset {
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pm8008j_active: pm8008j_active {
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pins = "gpio4";
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function = "normal";
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bias-disable;
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output-high;
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power-source = <0>;
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};
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};
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};
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&pmk8350 {
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pon_pbs@800 {
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status = "disabled";
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};
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};
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&pmk8350_vadc {
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/delete-node/ pm8350_ref_gnd;
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/delete-node/ pm8350_vref_1p25;
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/delete-node/ pm8350_die_temp;
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/delete-node/ pm8350_vph_pwr;
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/delete-node/ pm8350b_ref_gnd;
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/delete-node/ pm8350b_vref_1p25;
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/delete-node/ pm8350b_die_temp;
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/delete-node/ pm8350b_vph_pwr;
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/delete-node/ pm8350b_vbat_sns;
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/delete-node/ pmr735b_ref_gnd;
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/delete-node/ pmr735b_vref_1p25;
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/delete-node/ pmr735b_die_temp;
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/* PM7325 Channel nodes */
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pm7325_ref_gnd {
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reg = <PM7325_ADC7_REF_GND>;
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label = "pm7325_ref_gnd";
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qcom,pre-scaling = <1 1>;
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};
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pm7325_vref_1p25 {
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reg = <PM7325_ADC7_1P25VREF>;
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label = "pm7325_vref_1p25";
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qcom,pre-scaling = <1 1>;
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};
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pm7325_die_temp {
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reg = <PM7325_ADC7_DIE_TEMP>;
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label = "pm7325_die_temp";
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qcom,pre-scaling = <1 1>;
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};
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pm7325_vph_pwr {
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reg = <PM7325_ADC7_VPH_PWR>;
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label = "pm7325_vph_pwr";
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qcom,pre-scaling = <1 3>;
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};
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pm7325_quiet_therm {
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reg = <PM7325_ADC7_AMUX_THM1_100K_PU>;
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label = "pm7325_quiet_therm";
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qcom,ratiometric;
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qcom,hw-settle-time = <200>;
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qcom,pre-scaling = <1 1>;
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};
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pm7325_cam_flash_therm {
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reg = <PM7325_ADC7_AMUX_THM2_100K_PU>;
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label = "pm7325_cam_flash_therm";
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qcom,ratiometric;
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qcom,hw-settle-time = <200>;
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qcom,pre-scaling = <1 1>;
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};
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pm7325_sdm_skin_therm {
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reg = <PM7325_ADC7_AMUX_THM3_100K_PU>;
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label = "pm7325_sdm_skin_therm";
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qcom,ratiometric;
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qcom,hw-settle-time = <200>;
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qcom,pre-scaling = <1 1>;
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};
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pm7325_wide_rfc_therm {
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reg = <PM7325_ADC7_AMUX_THM4_100K_PU>;
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label = "pm7325_wide_rfc_therm";
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qcom,ratiometric;
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qcom,hw-settle-time = <200>;
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qcom,pre-scaling = <1 1>;
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};
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};
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&pmk8350_adc_tm {
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io-channels = <&pmk8350_vadc PM7325_ADC7_AMUX_THM1_100K_PU>,
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<&pmk8350_vadc PM7325_ADC7_AMUX_THM2_100K_PU>,
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<&pmk8350_vadc PM7325_ADC7_AMUX_THM3_100K_PU>,
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<&pmk8350_vadc PM7325_ADC7_AMUX_THM4_100K_PU>,
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<&pmk8350_vadc PMK8350_ADC7_AMUX_THM1_100K_PU>;
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pm7325_quiet_therm {
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reg = <PM7325_ADC7_AMUX_THM1_100K_PU>;
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qcom,ratiometric;
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qcom,hw-settle-time = <200>;
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};
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pm7325_cam_flash_therm {
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reg = <PM7325_ADC7_AMUX_THM2_100K_PU>;
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qcom,ratiometric;
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qcom,hw-settle-time = <200>;
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};
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pm7325_sdm_skin_therm {
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reg = <PM7325_ADC7_AMUX_THM3_100K_PU>;
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qcom,ratiometric;
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qcom,hw-settle-time = <200>;
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};
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pm7325_wide_rfc_therm {
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reg = <PM7325_ADC7_AMUX_THM4_100K_PU>;
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qcom,ratiometric;
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qcom,hw-settle-time = <200>;
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};
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pmk8350_xo_therm {
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reg = <PMK8350_ADC7_AMUX_THM1_100K_PU>;
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qcom,ratiometric;
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qcom,hw-settle-time = <200>;
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};
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};
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&thermal_zones {
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quiet-therm-usr {
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polling-delay-passive = <0>;
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polling-delay = <0>;
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thermal-governor = "user_space";
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thermal-sensors = <&pmk8350_adc_tm PM7325_ADC7_AMUX_THM1_100K_PU>;
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wake-capable-sensor;
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trips {
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active-config0 {
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temperature = <125000>;
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hysteresis = <1000>;
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type = "passive";
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};
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active-config1 {
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temperature = <125000>;
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hysteresis = <1000>;
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type = "passive";
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};
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};
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};
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camera-therm-usr {
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polling-delay-passive = <0>;
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polling-delay = <0>;
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thermal-governor = "user_space";
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thermal-sensors = <&pmk8350_adc_tm PM7325_ADC7_AMUX_THM2_100K_PU>;
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wake-capable-sensor;
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trips {
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active-config0 {
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temperature = <125000>;
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hysteresis = <1000>;
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type = "passive";
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};
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};
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};
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sdm-skin-therm-usr {
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polling-delay-passive = <0>;
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polling-delay = <0>;
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thermal-governor = "user_space";
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thermal-sensors = <&pmk8350_adc_tm PM7325_ADC7_AMUX_THM3_100K_PU>;
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wake-capable-sensor;
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trips {
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active-config0 {
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temperature = <125000>;
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hysteresis = <1000>;
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type = "passive";
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};
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};
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};
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rear-cam-therm-usr {
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polling-delay-passive = <0>;
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polling-delay = <0>;
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thermal-governor = "user_space";
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thermal-sensors = <&pmk8350_adc_tm PM7325_ADC7_AMUX_THM4_100K_PU>;
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wake-capable-sensor;
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trips {
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active-config0 {
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temperature = <125000>;
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hysteresis = <1000>;
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type = "passive";
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};
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};
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};
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xo-therm-usr {
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polling-delay-passive = <0>;
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polling-delay = <0>;
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thermal-governor = "user_space";
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thermal-sensors = <&pmk8350_adc_tm PMK8350_ADC7_AMUX_THM1_100K_PU>;
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wake-capable-sensor;
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trips {
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active-config0 {
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temperature = <125000>;
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hysteresis = <1000>;
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type = "passive";
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};
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};
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};
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};
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/*
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* Each QUP device that's a parent to PMIC must be listed as a critical device
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* to GCC
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*/
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&gcc {
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qcom,critical-devices = <&qupv3_se1_i2c>;
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};
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&qupv3_se1_i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "ok"
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pm8008i_chip: pm8008i@8 {
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compatible = "qcom,i2c-pmic";
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reg = <0x8>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pm8008i_active>;
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pm8008-chip@900 {
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compatible = "qcom,pm8008-chip";
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reg = <0x900>;
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PM8008I_EN: qcom,pm8008-chip-en {
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regulator-name = "pm8008i-chip-en";
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};
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};
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qcom,revid@100 {
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compatible = "qcom,qpnp-revid";
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reg = <0x100>;
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};
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};
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pm8008i_ldo: pm8008i@9 {
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compatible = "qcom,i2c-pmic";
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reg = <0x9>;
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,pm8008i-regulator {
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compatible = "qcom,pm8008-regulator";
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#address-cells = <1>;
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#size-cells = <0>;
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pm8008_en-supply = <&PM8008I_EN>;
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vdd_l1_l2-supply = <&S8B>;
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vdd_l3_l4-supply = <&BOB>;
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vdd_l5-supply = <&S1B>;
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vdd_l6-supply = <&BOB>;
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vdd_l7-supply = <&BOB>;
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L1I: pm8008i_l1: regulator@4000 {
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reg = <0x4000>;
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regulator-name = "pm8008i_l1";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1200000>;
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qcom,min-dropout-voltage = <160000>;
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qcom,hpm-min-load = <0>;
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};
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L2I: pm8008i_l2: regulator@4100 {
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reg = <0x4100>;
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regulator-name = "pm8008i_l2";
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regulator-min-microvolt = <950000>;
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regulator-max-microvolt = <1150000>;
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qcom,min-dropout-voltage = <128000>;
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qcom,hpm-min-load = <0>;
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};
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L3I: pm8008i_l3: regulator@4200 {
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reg = <0x4200>;
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regulator-name = "pm8008i_l3";
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regulator-min-microvolt = <2700000>;
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regulator-max-microvolt = <3000000>;
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qcom,min-dropout-voltage = <144000>;
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qcom,hpm-min-load = <0>;
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};
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L4I: pm8008i_l4: regulator@4300 {
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reg = <0x4300>;
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regulator-name = "pm8008i_l4";
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regulator-min-microvolt = <2700000>;
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regulator-max-microvolt = <2900000>;
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qcom,min-dropout-voltage = <128000>;
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qcom,hpm-min-load = <0>;
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};
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L5I: pm8008i_l5: regulator@4400 {
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reg = <0x4400>;
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regulator-name = "pm8008i_l5";
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regulator-min-microvolt = <1700000>;
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regulator-max-microvolt = <1900000>;
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qcom,min-dropout-voltage = <136000>;
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qcom,hpm-min-load = <0>;
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};
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L6I: pm8008i_l6: regulator@4500 {
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reg = <0x4500>;
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regulator-name = "pm8008i_l6";
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regulator-min-microvolt = <2700000>;
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regulator-max-microvolt = <2900000>;
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qcom,min-dropout-voltage = <128000>;
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qcom,hpm-min-load = <0>;
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};
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L7I: pm8008i_l7: regulator@4600 {
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reg = <0x4600>;
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regulator-name = "pm8008i_l7";
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regulator-min-microvolt = <2700000>;
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regulator-max-microvolt = <3000000>;
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qcom,min-dropout-voltage = <312000>;
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qcom,hpm-min-load = <0>;
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};
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};
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};
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pm8008j_chip: pm8008j@c {
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compatible = "qcom,i2c-pmic";
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reg = <0xc>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pm8008j_active>;
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pm8008-chip@900 {
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compatible = "qcom,pm8008-chip";
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reg = <0x900>;
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PM8008J_EN: qcom,pm8008-chip-en {
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regulator-name = "pm8008j-chip-en";
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};
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};
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qcom,revid@100 {
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compatible = "qcom,qpnp-revid";
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reg = <0x100>;
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};
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};
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pm8008j_ldo: pm8008j@d {
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compatible = "qcom,i2c-pmic";
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reg = <0xd>;
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,pm8008j-regulator {
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compatible = "qcom,pm8008-regulator";
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#address-cells = <1>;
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#size-cells = <0>;
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pm8008_en-supply = <&PM8008J_EN>;
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vdd_l1_l2-supply = <&S8B>;
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vdd_l3_l4-supply = <&S1B>;
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vdd_l5-supply = <&BOB>;
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vdd_l6-supply = <&BOB>;
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vdd_l7-supply = <&BOB>;
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L1J: pm8008j_l1: regulator@4000 {
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reg = <0x4000>;
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regulator-name = "pm8008j_l1";
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regulator-min-microvolt = <950000>;
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regulator-max-microvolt = <1150000>;
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qcom,min-dropout-voltage = <96000>;
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qcom,hpm-min-load = <0>;
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};
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L2J: pm8008j_l2: regulator@4100 {
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reg = <0x4100>;
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regulator-name = "pm8008j_l2";
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regulator-min-microvolt = <950000>;
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regulator-max-microvolt = <1250000>;
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qcom,min-dropout-voltage = <24000>;
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qcom,hpm-min-load = <0>;
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};
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L3J: pm8008j_l3: regulator@4200 {
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reg = <0x4200>;
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regulator-name = "pm8008j_l3";
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regulator-min-microvolt = <1460000>;
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regulator-max-microvolt = <1800000>;
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qcom,min-dropout-voltage = <224000>;
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qcom,hpm-min-load = <0>;
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};
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L4J: pm8008j_l4: regulator@4300 {
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reg = <0x4300>;
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regulator-name = "pm8008j_l4";
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regulator-min-microvolt = <1504000>;
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regulator-max-microvolt = <1600000>;
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qcom,min-dropout-voltage = <0>;
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qcom,hpm-min-load = <0>;
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};
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L5J: pm8008j_l5: regulator@4400 {
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reg = <0x4400>;
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regulator-name = "pm8008j_l5";
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regulator-min-microvolt = <2700000>;
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regulator-max-microvolt = <2900000>;
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qcom,min-dropout-voltage = <104000>;
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qcom,hpm-min-load = <0>;
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};
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L6J: pm8008j_l6: regulator@4500 {
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reg = <0x4500>;
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regulator-name = "pm8008j_l6";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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qcom,min-dropout-voltage = <112000>;
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qcom,hpm-min-load = <0>;
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};
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L7J: pm8008j_l7: regulator@4600 {
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reg = <0x4600>;
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regulator-name = "pm8008j_l7";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3544000>;
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qcom,min-dropout-voltage = <96000>;
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qcom,hpm-min-load = <0>;
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};
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};
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};
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};
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&pm7325_tz {
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io-channels = <&pmk8350_vadc PM7325_ADC7_DIE_TEMP>;
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io-channel-names = "thermal";
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};
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&pmr735a_tz {
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io-channels = <&pmk8350_vadc PMR735A_ADC7_DIE_TEMP>;
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io-channel-names = "thermal";
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};
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&soc {
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reboot_reason {
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compatible = "qcom,reboot-reason";
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nvmem-cells = <&restart_reason>;
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nvmem-cell-names = "restart_reason";
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};
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};
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